WM8352GEB/V Wolfson Microelectronics, WM8352GEB/V Datasheet - Page 133

• Manufacturer Part Number: WM8352GEB/V
• Description: Audio CODECs Audio CODEC plus pwr management
• Manufacturer: Wolfson Microelectronics

Specifications of WM8352GEB/V

• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Conversion Rate: 48 KSPS
• Interface Type: Serial (2-Wire, 3-Wire, 4-Wire)
• Resolution: 12 bit
• Operating Supply Voltage: 3.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• Minimum Operating Temperature: - 25 C
• Number Of Channels: 2 ADC/2 DAC
• Supply Current: 260 uA
• Thd Plus Noise: - 83 dB
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 8
• No. Of Output Channels: 6
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 95dB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
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The DC-DC Converters and the LDO Regulators have a first-level interrupt, UV_INT (see
Section 24). This comprises second-level interrupts from each of the DC-DC Converters and the
LDO Regulators.
Each DC-DC Converter has a dedicated second-level interrupt which indicates an under-voltage
condition. These can be masked by setting the applicable mask bit as defined in Table 79.
R28 (1Ch)
Under Voltage
Interrupt Status
R36 (24h)
Under Voltage
Interrupt Mask
Note: there is no over-current fault condition for converters 2 and 5.
Table 79 DC-DC Converter Interrupts
ADDRESS
as in
R28
BIT
5
4
3
2
1
0
UV_DC6_EINT
UV_DC5_EINT
UV_DC4_EINT
UV_DC3_EINT
UV_DC2_EINT
UV_DC1_EINT
“IM_” + name of respective
bit in R28
LABEL
DCDC6 Under-voltage interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
DCDC5 Under-voltage interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
DCDC4 Under-voltage interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
DCDC3 Under-voltage interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
DCDC2 Under-voltage interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
DCDC1 Under-voltage interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
Mask bits for DC-DC converter under-
voltage interrupts
Each of these bits masks the respective
bit in R28 when it is set to 1 (e.g.
UV_DC1_EINT in R28 does not trigger a
UV_INT interrupt when
IM_UV_DC1_EINT in R36 is set).
DESCRIPTION
PD, March 2010, Rev 4.2
WM8352
133