WM8352GEB/V Wolfson Microelectronics, WM8352GEB/V Datasheet - Page 205

• Manufacturer Part Number: WM8352GEB/V
• Description: Audio CODECs Audio CODEC plus pwr management
• Manufacturer: Wolfson Microelectronics

Specifications of WM8352GEB/V

• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Conversion Rate: 48 KSPS
• Interface Type: Serial (2-Wire, 3-Wire, 4-Wire)
• Resolution: 12 bit
• Operating Supply Voltage: 3.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• Minimum Operating Temperature: - 25 C
• Number Of Channels: 2 ADC/2 DAC
• Supply Current: 260 uA
• Thd Plus Noise: - 83 dB
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 8
• No. Of Output Channels: 6
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 95dB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
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24.3.9
The first-level SYS_INT interrupt comprises four second-level interrupts for various system events.
Each of these has a status bit in Register R26 and a mask bit in Register R34, as defined in Table
150.
R26 (1Ah)
Interrupt Status
2
R34 (22h)
Interrupt Status
2 Mask
Table 150 System Interrupts
24.3.10 CHARGER INTERRUPTS
The system interrupt CHG_INT interrupt comprises several second-level interrupts for the battery
charger. Each of these has a status bit in Register R25 and a mask bit in Register R33, as defined in
Table 151.
R25 (19h)
Interrupt Status
1
ADDRESS
ADDRESS
SYSTEM INTERRUPTS
BIT
BIT
3:0
15
14
13
12
11
10
9
3
2
1
0
SYS_HYST_COMP_FAIL_EI
NT
SYS_CHIP_GT115_EINT
SYS_CHIP_GT140_EINT
SYS_WDOG_TO_EINT
“IM_” + name of respective
bit in R26
CHG_BATT_HOT_EINT
CHG_BATT_COLD_EINT
CHG_BATT_FAIL_EINT
CHG_TO_EINT
CHG_END_EINT
CHG_START_EINT
CHG_FAST_RDY_EINT
LABEL
LABEL
Hysteresis comparator indication that
LINE or BATT is less that shutdown
threshold.
(Rising Edge triggered)
Note: This bit is cleared once read.
Chip over 115°C temp limit.
(Rising Edge triggered)
Note: This bit is cleared once read.
Chip over 140°C temp limit.
(Rising Edge triggered)
Note: This bit is cleared once read.
Watchdog timeout has occurred.
(Rising Edge triggered)
Note: This bit is cleared once read.
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Each bit in R34 enables or masks the
corresponding bit in R26 The default value
for these bits is 0 (unmasked).
Battery temp too hot.
(Rising Edge triggered)
Note: This bit is cleared once read.
Battery temp too cold.
(Rising Edge triggered)
Note: This bit is cleared once read.
Battery fail.
(Rising Edge triggered)
Note: This bit is cleared once read.
Charger timeout.
(Rising Edge triggered)
Note: This bit is cleared once read.
Charging final stage.
(Rising Edge triggered)
Note: This bit is cleared once read.
Charging started.
(Rising Edge triggered)
Note: This bit is cleared once read.
Indicates that the charger is ready to go
into fast charge.
(Rising Edge triggered)
Note: This bit is cleared once read.
DESCRIPTION
DESCRIPTION
PD, March 2010, Rev 4.2
WM8352
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