WM8352GEB/V Wolfson Microelectronics, WM8352GEB/V Datasheet - Page 139

• Manufacturer Part Number: WM8352GEB/V
• Description: Audio CODECs Audio CODEC plus pwr management
• Manufacturer: Wolfson Microelectronics

Specifications of WM8352GEB/V

• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Conversion Rate: 48 KSPS
• Interface Type: Serial (2-Wire, 3-Wire, 4-Wire)
• Resolution: 12 bit
• Operating Supply Voltage: 3.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• Minimum Operating Temperature: - 25 C
• Number Of Channels: 2 ADC/2 DAC
• Supply Current: 260 uA
• Thd Plus Noise: - 83 dB
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 8
• No. Of Output Channels: 6
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 95dB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
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The status of the LDO Regulators can be indicated and monitored externally via a GPIO pin
configured as /VCC_FAULT (see Section 20). When a GPIO pin is configured as /VCC_FAULT
output, a logic low level on this pin indicates that there is a fault condition on one of the LDO
Regulators, DC-DC Converters, or the Current Limit switch.
The /VCC_FAULT output is configurable by the control fields in Register R215. The fields described
in Table 87 determine which of the LDOs contribute to the /VCC_FAULT indication. An undervoltage
or overvoltage condition on any unmasked LDO will cause the /VCC_FAULT output to be set to logic
low.
R215 (D7h)
VCC_FAULT
Table 87 LDO Regulator /VCCFAULT mask bits
14.7.4
By default, all DC Converters and LDOs are disabled in the OFF state. Additional control is provided
to enable LDO1 to be configured differently, allowing it to be enabled in the OFF state, or else to be
controlled by a GPIO pin configured as /LDO_ENA (see Section 20.2.2). These options are selected
by setting the register fields described in Table 88. In practical applications, however, these options
are set by the Config Mode settings and are not set by users.
Operation of LDO1 in the OFF state is subject to the restriction that VOUT1 must be set to at least
1.8V.
LDO1_PIN_MODE = 0
LDO1_PIN_MODE = 1
LDO1_PIN_EN = 0
LDO1_PIN_MODE = 1
LDO1_PIN_EN = 1
Table 88 LDO1 Additional Control
Note that LDO1 is always disabled in BACKUP and ZERO states.
Note that, when LDO1_PIN_MODE = 1, then LDO1 only operates as determined by the LDO1_VSEL
field. The Hibernate settings are ignored under this configuration.
ADDRESS
ADDITIONAL CONTROL FOR LDO1
CONDITION
BIT
11
10
9
8
LDO4_FAULT
LDO3_FAULT
LDO2_FAULT
LDO1_FAULT
LABEL
LDO1 controlled as normal via register bits
LDO1 enabled at all times
LDO1 controlled by /LDO_ENA only
DEFAULT
0
0
0
0
LDO4 fault mask for the /VCC_FAULT
0 = don't mask converter fault
1 = mask converter fault
LDO3 fault mask for the /VCC_FAULT
0 = don't mask converter fault
1 = mask converter fault
LDO2 fault mask for the /VCC_FAULT
0 = don't mask converter fault
1 = mask converter fault
LDO1 fault mask for the /VCC_FAULT
0 = don't mask converter fault
1 = mask converter fault
DESCRIPTION
DESCRIPTION
PD, March 2010, Rev 4.2
WM8352
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