WM8352GEB/V Wolfson Microelectronics, WM8352GEB/V Datasheet - Page 79

• Manufacturer Part Number: WM8352GEB/V
• Description: Audio CODECs Audio CODEC plus pwr management
• Manufacturer: Wolfson Microelectronics

Specifications of WM8352GEB/V

• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Conversion Rate: 48 KSPS
• Interface Type: Serial (2-Wire, 3-Wire, 4-Wire)
• Resolution: 12 bit
• Operating Supply Voltage: 3.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• Minimum Operating Temperature: - 25 C
• Number Of Channels: 2 ADC/2 DAC
• Supply Current: 260 uA
• Thd Plus Noise: - 83 dB
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 8
• No. Of Output Channels: 6
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 95dB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
13.8 OUTPUT SIGNAL PATH
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The analogue output pins produce audio signals to drive headphones, line-out connections and/or
external loudspeaker amplifiers. These pins include:
OUT1L, OUT1R, OUT2L and OUT2R have individual analogue volume PGAs with -57dB to +6dB
ranges. AC-coupled and Capless headphone drive modes are available. Common mode noise
rejection is possible using the HPCOM connection.
OUT3 and OUT4 can be configured as a stereo line out (OUT3 is left output and OUT4 is right
output). OUT3 and OUT4 can also be used as a Vmid buffer to provide a “ground” reference for
headphone outputs, eliminating the need for DC blocking capacitors.
Alternatively, OUT4 can be used to provide a mono mix of left and right channels.
All analogue output pins are powered through the HPVDD and HPGND pins.
Each output can drive a headphone load down to 16Ω.
There are four output mixers in the output signal path: the left and right channel mixers which control
the signals to headphone (and optionally the line outputs) and also dedicated OUT3 and OUT4
mixers.
13.8.1
Each output can be individually enabled or disabled via dedicated control bits.
R10 (0Ah)
R104 (68h)
R10 (0Ah)
R105 (69h)
R10 (0Ah)
R106 (70h)
R10 (0Ah)
R107 (71h)
R9 (09h)
R92 (5Ch)
R9 (09h)
R93 (5Dh)
Note: Each bit can be accessed through two separate control registers. Reading from or writing to
either register location has the same effect.
Table 37 Enabling the Analogue Outputs
ADDRESS



OUT1L and OUT1R
OUT2L and OUT2R
OUT3 and OUT4
ENABLING THE ANALOGUE OUTPUTS
BIT
15
15
15
15
15
15
0
1
2
3
4
5
OUT1L_ENA
OUT1R_ENA
OUT2L_ENA
OUT2R_ENA
OUT3_ENA
OUT4_ENA
LABEL
DEFAULT
0
0
0
0
0
0
OUT1L enable
0 = disabled
1 = enabled
OUT1R enable
0 = disabled
1 = enabled
OUT2L enable
0 = disabled
1 = enabled
OUT2R enable
0 = disabled
1 = enabled
OUT3 enable
0 = disabled
1 = enabled
OUT4 enable
0 = disabled
1 = enabled
DESCRIPTION
PD, March 2010, Rev 4.2
WM8352
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