AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 108

• Manufacturer Part Number: AU80610004392AAS LBLA
• Description: MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D500r

Specifications of AU80610004392AAS LBLA

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.9.5
108
RID2 - Revision Identification
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the revision number for Device #2 Functions 0 and 1.
2:0
7:0
Bit
Bit
8
7
6
5
4
3
Access
Access
RO
RO
RO
RO
RO
RO
RO
RO
Default
Default
Value
Value
000b
02h
0b
1b
0b
0b
1b
0b
This is an 8-bit value that indicates the revision
identification number for the CPU Uncore Device
0. For the A-0 Stepping, this value is 00h.
Revision Identification Number (RID):
00h: A-0
01h: A-1
02h: B-0
Master Data Parity Error Detected (DPD):
the IGD does not do any parity detection), this bit is
hardwired to 0.
Fast Back-to-Back (FB2B):
the transactions are not to the same agent.
User Defined Format (UDF):
66 MHz PCI Capable (66C):
Capability List (CLIST):
provides an offset into the function's PCI Configuration
Space containing a pointer to the location of the first item
in the list.
Interrupt Status (INTSTS):
Only when the Interrupt Disable bit in the command
register is a 0 and this Interrupt Status bit is a 1, will the
devices INTx# signal be asserted.
Reserved ():
Since Parity Error Response is hardwired to disabled (and
Hardwired to 1. The IGD accepts fast back-to-back when
Hardwired to 0.
N/A - Hardwired to 0.
This bit is set to 1 to indicate that the register at 34h
This bit reflects the state of the interrupt in the device.
0/2/0/PCI
8h
02h
8 bits
RO;
Processor Configuration Registers
Description
Description
Datasheet