AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 76

• Manufacturer Part Number: AU80610004392AAS LBLA
• Description: MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D500r

Specifications of AU80610004392AAS LBLA

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.6.12
1.6.13
76
C0CYCTRKREFR - Channel 0 CYCTRK REFR
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Channel 0 CYCTRK Refresh Registers.
C0CKECTRL - Channel 0 CKE Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
CKE controls for Channel 0
15:13
31:28
26:24
12:9
8:0
Bit
Bit
27
Access
Access
RW
RW
RW
RW
RO
RO
00000000
Default
Default
Value
0000b
Value
0000b
000b
000b
0b
0b
RST/
RST/
PWR
PWR
Core
Core
Core
Core
Core
Core
0/0/0/MCHBAR
25B-25Ch
0000h
16 bits
0/0/0/MCHBAR
260-263h
00000800h
32 bits
RO; RW;
RW; RW/L; RO;
RESERVED () (RESERVED ()):
Reserved.
Same Rank PALL to REF Delayed
(C0sd_cr_pchgall_rfsh):
This configuration register indicates the
minimum allowed spacing (in DRAM clocks)
between the PRE-ALL and REF commands to
the same rank.
Same Rank REF to REF Delayed
(C0sd_cr_rfsh_rfsh):
This configuration register indicates the
minimum allowed spacing (in DRAM clocks)
between two REF commands to same ranks.
Reserved ():
Reserved
Start the self-refresh exit sequence
(sd0_cr_srcstart):
This configuration register indicates the request
to start the self-refresh exit sequence
CKE pulse width requirement in high
phase (sd0_cr_cke_pw_hl_safe):
This configuration register indicates CKE pulse
width requirement in high phase. Corresponds
to tCKE ( high ) at DDR Spec.
Processor Configuration Registers
Description
Description
Datasheet