AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 54

• Manufacturer Part Number: AU80610004392AAS LBLA
• Description: MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D500r

Specifications of AU80610004392AAS LBLA

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

54
2:0
Bit
4
3
RW/L/K
Access
RW/L
RO
Default
Value
010b
0b
0b
RST/
PWR
Core
Core
Core
update the display even when SMM is mapped
over the VGA range. Software should ensure
that D_OPEN=1 and D_CLS=1 are not set at the
same time.
SMM Space Locked (D_LCK):
to 0 and D_LCK, D_OPEN, C_BASE_SEG,
H_SMRAM_EN, TSEG_SZ and TSEG_EN become
read only. D_LCK can be set to 1 via a normal
configuration space write but can only be
cleared by a Full Reset. The combination of
D_LCK and D_OPEN provide convenience with
security. The BIOS can use the D_OPEN function
to initialize SMM space and then use D_LCK to
"lock down" SMM space in the future so that no
application software (or BIOS itself) can violate
the integrity of SMM space, even if the program
has knowledge of the D_OPEN function.
Global SMRAM Enable (G_SMRAME):
are enabled, providing 128 KB of DRAM
accessible at the A0000h address while in SMM
(ADSB with SMM decode). To enable Extended
SMRAM function this bit has be set to 1. Refer to
the section on SMM for more details. Once
D_LCK is set, this bit becomes read only.
Compatible SMM Space Base Segment
(C_BASE_SEG):
SMM DRAM is not remapped. It is simply made
visible if the conditions are right to access SMM
space, otherwise the access is forwarded to DMI.
Since the CPU Uncore supports only the SMM
space between A0000 and BFFFF, this field is
hardwired to 010.
When D_LCK is set to 1 then D_OPEN is reset
If set to a 1, then Compatible SMRAM functions
This field indicates the location of SMM space.
Processor Configuration Registers
Description
Datasheet