AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 124

• Manufacturer Part Number: AU80610004392AAS LBLA
• Description: MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D500r

Specifications of AU80610004392AAS LBLA

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.9.31
124
MC - Message Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
System software can modify bits in this register, but the device is prohibited from
doing so. If the device writes the same message multiple times, only one of those
messages is guaranteed to be serviced. If all of them must be serviced, the device
must not generate the same message again until the driver services the earlier one.
15:8
6:4
3:1
Bit
7
Access
RW
RO
RO
RO
Default
Value
000b
000b
00h
0b
Reserved ():
64 Bit Capable (64BCAP):
does not implement the upper 32 bits of the
Message address register and is incapable of
generating a 64-bit memory address.
This may need to change in future
implementations when addressable system
memory exceeds the 32b/4GB limit.
Multiple Message Enable (MME):
indicate the actual number of messages
allocated to this device. This number will be
equal to or less than the number actually
requested.
The encoding is the same as for the MMC field
below.
Multiple Message Capable (MMC):
the number of messages being requested by
this device.
Value:
000: 1
All of the following are reserved in this
implementation
001: 2
010: 4
011: 8
100: 16
101: 32
110: Reserved
111: Reserved
Hardwired to 0 to indicate that the function
System Software reads this field to determine
System software programs this field to
0/2/0/PCI
92-93h
0000h
16 bits
RO; RW;
Number of requests
Processor Configuration Registers
Description
Datasheet