AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 152
AU80610004392AAS LBLA
Manufacturer Part Number
AU80610004392AAS LBLA
Description
MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
Manufacturer
Intel
Series
ATOM - D500r
Datasheet
1.AU80610004392AAS_LBLA.pdf
(153 pages)
Specifications of AU80610004392AAS LBLA
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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1.11
1.11.1
152
Device 2 IO
Index - MMIO Address Register
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
MMIO_INDEX: A 32 bit IO write to this port loads the offset of the MMIO register or
offset into the GTT that needs to be accessed. An IO Read returns the current value of
this register. An 8/16 bit IO write to this register is completed by the CPU UNCORE
but does not update this register.
This mechanism to access internal graphics MMIO registers must not be used to
access VGA IO registers which are mapped through the MMIO space. VGA registers
must be accessed directly through the dedicated VGA IO ports.
MMIO
Address
Register
MMIO Data
Register
31:2
1:0
Register
Bit
Name
Access
RW
RW
Index
Data
Register
Symbol
00000000h
Default
Value
00b
0
4
Register
Start
0/2/0/PCI IO
0-3h
00000000h
RW;
32 bits
• 00: MMIO Registers
• 01: GTT
• 1X: Reserved
Register/GTT Offset (REGGTTO):
This field selects any one of the DWORD
registers within the MMIO register space
of Device #2 if the target is MMIO
Registers.
This field selects a GTT offset if the
target is the GTT.
Target (TARG):
3
7
Register
Processor Configuration Registers
End
Description
00000000h
00000000h
Default
Value
RW;
RW;
Access
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