AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 21

• Manufacturer Part Number: AU80610004392AAS LBLA
• Description: MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D500r

Specifications of AU80610004392AAS LBLA

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Processor Configuration Registers
1.2.4.1
1.2.4.2
1.2.5
Datasheet
TOLUD register is restricted to 4 GB memory (A[31:20]), but processor can support
up to 8GB, limited by DRAM pins. For physical memory greater than 4 GB, the TOUUD
register helps identify the address range in between the 4 GB boundary and the top of
physical memory. This identifies memory that can be directly accessed (including
reclaim address calculation) which is useful for memory access indication, early path
indication, and trusted read indication. When reclaim is enabled, TOLUD must be
64MB aligned, but when reclaim is disabled, TOLUD can be 1 MB aligned.
The Reclaim Base/Limit registers cannot be used directly to determine the effective
size of memory because reclaim can be disabled.
Memory Re-claim Background
The following are examples of Memory Mapped IO devices are typically located below
4 GB:
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The IMC provides the capability to reclaim the physical memory overlapped by the
Memory Mapped IO logical address space. The IMC remaps physical memory from the
Top of Low Memory (TOLUD) boundary up to the 4 GB boundary to an equivalent
sized logical address range located just above the top of memory (TOM).
Memory Reclaiming
An incoming address (referred to as a logical address) is checked to see if it falls in
the memory remap window. The bottom of the remap window is defined by the value
in the RECLAIMBASE register. The top of the remap window is defined by the value in
the RECLAIMLIMIT register. An address that falls within this window is reclaimed to
the physical memory starting at the address defined by the TOLUD register. The
TOLUD register must be 64M aligned when RECLAIM is enabled, but can be 1M aligned
when reclaim is disabled.
PCI Express Configuration Address Space
There is a device 0 register, PCIEXBAR, which defines the base address for the
configuration space associated with all devices and functions that are potentially a
part of the PCI Express root complex hierarchy. The size of this range will be
programmable for the processor. BIOS must assign this address range such that it will
not conflict with any other address ranges.
See the configuration portion of this document for more details.
High BIOS
H-Seg
T-Seg
GFX stolen
GTT stolen
xAPIC
Local APIC
Memory Mapped IO space that supports only 32B addressing
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