AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 57

• Manufacturer Part Number: AU80610004392AAS LBLA
• Description: MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D500r

Specifications of AU80610004392AAS LBLA

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Processor Configuration Registers
1.5.31
1.5.32
Datasheet
Note: This register is locked and becomes Read Only when the D_LCK bit in the SMRAM
TOUUD - Top of Upper Usable Dram
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This 16 bit register defines the Top of Upper Usable DRAM.
Configuration software must set this value to TOM minus all EP stolen memory if
reclaim is disabled. If reclaim is enabled, this value must be set to (reclaim limit + 1
byte) 64MB aligned since reclaim limit is 64MB aligned. Address bits 19:0 are
assumed to be 000_0000h for the purposes of address comparison. The Host interface
positively decodes an address towards DRAM if the incoming address is less than the
value programmed in this register and greater than or equal to 4GB.
GBSM - Graphics Base of Stolen Memory
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the base address of graphics data stolen DRAM memory. BIOS
determines the base of graphics data stolen memory by subtracting the graphics data
stolen memory size (PCI Device 0 offset 52 bits 7:4) from TOLUD (PCI Device 0 offset
B0 bits 15:04).
register is set.
15:0
Bit
Access
RW/L
Default
Value
0000h
RST/
PWR
Core
0/0/0/PCI
A2-A3h
0000h
16 bits
0/0/0/PCI
A4-A7h
00000000h
32 bits
RW/L;
RO; RW/L;
TOUUD (TOUUD):
This register contains bits 35 to 20 of an address
one byte above the maximum DRAM memory
above 4G that is usable by the operating
system. Configuration software must set this
value to TOM minus all EP stolen memory if
reclaim is disabled.
value must be set to (reclaim limit + 1 byte)
64MB aligned since reclaim limit is 64MB
aligned. Address bits 19:0 are assumed to be
000_0000h for the purposes of address
comparison. The Host interface positively
decodes an address towards DRAM if the
incoming address is less than the value
programmed in this register and greater than
4GB.
Description
If reclaim is enabled, this
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