AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 127
AU80610004392AAS LBLA
Manufacturer Part Number
AU80610004392AAS LBLA
Description
MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
Manufacturer
Intel
Series
ATOM - D500r
Datasheet
1.AU80610004392AAS_LBLA.pdf
(153 pages)
Specifications of AU80610004392AAS LBLA
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.9.35
1.9.36
Datasheet
PMCAPID - Power Management Capabilities ID
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
PMCAP - Power Management Capabilities
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register is a Mirror of Function 0 with the same read/write attributes. The
hardware implements a single physical register common to both functions 0 and 1.
15:11
15:8
7:0
8:6
Bit
Bit
10
9
5
Access
Access
RWO
RO
RO
RO
RO
RO
RO
Default
Default
Value
Value
000b
00h
01h
00h
0b
0b
1b
Next Capability Pointer (NEXT_PTR):
capabilities list. BIOS is responsible for writing
this to the FLR Capability when applicable.
Capability Identifier (CAP_ID):
SIG defines this ID is 01h for power
management.
PME Support (PMES):
the IGD may assert PME#. Hardwired to 0 to
indicate that the IGD does not assert the PME#
signal.
D2 Support (D2):
The D2 power management state is not
supported. This bit is hardwired to 0.
D1 Support (D1):
management state is not supported.
Reserved ():
Device Specific Initialization (DSI):
initialization of the IGD is required before
generic class device driver is to use it.
This contains a pointer to the next item in the
This field indicates the power states in which
Hardwired to 0 to indicate that the D1 power
Hardwired to 1 to indicate that special
0/2/0/PCI
D0-D1h
0001h
16 bits
0/2/0/PCI
D2-D3h
0022h
16 bits
RWO; RO;
RO;
Description
Description
127
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