AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 18

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AU80610004392AAS LBLA

Manufacturer Part Number
AU80610004392AAS LBLA
Description
MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
Manufacturer
Intel
Series
ATOM - D500r
Datasheet

Specifications of AU80610004392AAS LBLA

Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1.2.3
18
PCI* Memory Address Range (TOLUD - 4 GB)
This address range, from the top of low usable DRAM (TOLUD) to 4 GB is normally
mapped to the DMI Interface.
Device 0 exceptions are:
Addresses decoded to the egress port registers (PXPEPBAR)
Addresses decoded to the memory mapped range for internal MCH registers
(MCHBAR)
Addresses decoded to the flat memory-mapped address spaced to access device
configuration registers (PCIEXBAR)
Addresses decoded to the registers associated with the MCH/PCH Serial Interconnect
(DMI) register memory range. (DMIBAR)
In integrated graphics configurations, there are exceptions to this rule:
Addresses decoded to the IGD registers and internal graphics instruction port
(Function 0 MMADR, Function 1 MMADR)
Addresses decode to the internal graphics translation window (GMADR)
Addresses decode to the internal graphics translation table (GTTADR)
Some of the MMIO Bars may be mapped to this range or to the range above TOUUD.
There are sub-ranges within the PCI Memory address range defined as APIC
Configuration Space, and High BIOS Address Range. The exceptions listed above for
internal graphics MUST NOT overlap with these ranges.
Processor Configuration Registers
Datasheet

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