AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 77

• Manufacturer Part Number: AU80610004392AAS LBLA
• Description: MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D500r

Specifications of AU80610004392AAS LBLA

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Processor Configuration Registers
Datasheet
19:17
15:14
13:10
9:1
Bit
23
22
21
20
16
0
Access
RW/L
RW/L
RW/L
RW/L
RW
RW
RW
RW
RW
RO
00000000
Default
0010b
Value
000b
00b
0b
0b
0b
0b
0b
0b
0b
RST/
PWR
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Rank 3 Population (sd0_cr_rankpop3):
1 - Rank 3 populated
0 - Rank 3 not populated
Rank 2 Population (sd0_cr_rankpop2):
1 - Rank 2 populated
0 - Rank 2 not populated
Rank 1 Population (sd0_cr_rankpop1):
1 - Rank 1 populated
0 - Rank 1 not populated
Rank 0 Population (sd0_cr_rankpop0):
1 - Rank 0 populated
0 - Rank 0 not populated
CKE pulse width requirement in low phase
(sd0_cr_cke_pw_lh_safe):
This configuration register indicates CKE pulse
width requirement in low phase. Corresponds
to tCKE ( low ) at DDR Spec.
Enable CKE toggle for PDN entry/exit
(sd0_cr_pdn_enable):
This configuration bit indicates that the toggling
of CKE's (for PDN entry/exit) is enabled.
Reserved ()
Minimum Powerdown exit to Non-Read
command spacing (sd0_cr_txp):
This configuration register indicates the
minimum number of clocks to wait following
assertion of CKE before issuing a non-read
command.
1001=2-9clocks.
Self refresh exit count
(sd0_cr_slfrfsh_exit_cnt):
This configuration register indicates the Self
refresh exit count. (Program to
255). Corresponds to tXSNR/tXSRD at DDR
Spec.
indicates only 1 DIMM populated
(sd0_cr_singleDIMMpop):
This configuration register indicates the that
only 1 DIMM is populated.
1010-1111=Reserved.
Description
0000-0001=Reserved.
0010-
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