AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 56

• Manufacturer Part Number: AU80610004392AAS LBLA
• Description: MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D500r

Specifications of AU80610004392AAS LBLA

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.5.30
56
TOM - Top of Memory
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
size reported to the OS using this Register.
This Register contains the size of physical memory. BIOS determines the memory
15:10
9:0
Bit
Bit
0
Access
Access
RW/L
RW/L
RO
Default
Default
Value
Value
001h
00h
0b
RST/
RST/
PWR
PWR
Core
Core
Core
0/0/0/PCI
A0-A1h
0001h
16 bits
RO; RW/L;
Stolen Memory Size).
10:8 MB Tseg (TOLUD - GTT Graphics Memory
Size - Graphics Stolen Memory Size - 8M) to
(TOLUD - GTT Graphics Memory Size - Graphics
Stolen Memory Size).
1:Reserved.
Once D_LCK has been set, these bits becomes
read only.
TSEG Enable (T_EN):
SMRAM space only. When G_SMRAME = 1 and
TSEG_EN = 1, the TSEG is enabled to appear in
the appropriate physical address space. Note
that once D_LCK is set, this bit becomes read
only.
Reserved ():
Top of Memory (TOM):
This register reflects the total amount of
populated physical memory. This is NOT
necessarily the highest main memory address
(holes may exist in main memory address map
due to addresses allocated for memory mapped
IO). These bits correspond to address bits
35:26 (64MB granularity). Bits 25:0 are
assumed to be 0.
MCH determines the base of EP stolen memory
by subtracting the EP stolen memory size from
TOM
Enabling of SMRAM memory for Extended
Processor Configuration Registers
Description
Description
Datasheet