AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 151
AU80610004392AAS LBLA
Manufacturer Part Number
AU80610004392AAS LBLA
Description
MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
Manufacturer
Intel
Series
ATOM - D500r
Datasheet
1.AU80610004392AAS_LBLA.pdf
(153 pages)
Specifications of AU80610004392AAS LBLA
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.10.28
Datasheet
SWSMI - Mirror of Func0 Software SMI
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
As long as there is the potential that DVO port legacy drivers exist which expect this
register at this address, Dev#2F0address E0h-E1h must be reserved for this register.
15:8
7:1
Bit
Bit
0
Access
Access
RO
RO
RO
Default
Default
Value
Value
00h
00h
0b
an unsupported state to this field, write
operation must complete normally on the bus,
but the data is discarded and no state change
occurs. On a transition from D3 to D0 the
graphics controller is optionally reset to initial
values. Behavior of the graphics controller in
supported states is detailed in the power
management section of the BIOS Spec.
Software Scratch Bits (SWSB):
Software Flag (SWF):
desired, as well as return result.
GMCH Software SMI Event (GSSMIE):
Software must write a "0" to clear this bit.
Used to indicate caller and SMI function
When Set this bit will trigger an SMI.
Bits[1:0] Power state
00: D0 Default
01: D1 Not Supported
10: D2 Not Supported
11: D3
0/2/1/PCI
E0-E1h
0000h
16 bits
RO;
Description
Description
151
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