CY8C3866AXI-040 Cypress Semiconductor Corp, CY8C3866AXI-040 Datasheet - Page 29

• Manufacturer Part Number: CY8C3866AXI-040
• Description: PSOC 3 TQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ 3 CY8C38xxr

Specifications of CY8C3866AXI-040

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.71 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 67MHz
• Number Of I /o: 62
• Eeprom Size: 2K x 8
• Core Processor: 8051
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 2x20b, D/A 4x8b
• Oscillator Type: Internal
• Peripherals: CapSense, DMA, LCD, POR, PWM, WDT
• Connectivity: CAN, EBI/EMI, I²C, LIN, SPI, UART/USART, USB
• Core Size: 8-Bit
• Processor Series: CY8C38
• Core: 8051
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SPI, UART, USB
• Maximum Clock Frequency: 67 MHz
• Number Of Programmable I/os: 28 to 72
• Number Of Timers: 4
• Operating Supply Voltage: 0.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Controller Family/series: (8051) PSOC 3
• No. Of I/o's: 62
• Eeprom Memory Size: 2KB
• Ram Memory Size: 8KB
• Cpu Speed: 67MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.2 Power System
The power system consists of separate analog, digital, and I/O supply pins, labeled Vdda, Vddd, and Vddiox, respectively. It also
includes two internal 1.8-V regulators that provide the digital (Vccd) and analog (Vcca) supplies for the internal core logic. The output
pins of the regulators (Vccd and Vcca) and the Vddio pins must have capacitors connected as shown in
pins must be shorted together, with as short a trace as possible, and connected to a 1-µF ±10-percent X5R capacitor. The power
system also contains a sleep regulator, an I
Note The two Vccd pins must be connected together with as short a trace as possible. A trace under the device is recommended, as
shown in
Document Number: 001-11729 Rev. *R
Figure 2-6
on page 10.
Vddio1
Vddio2
Vssd
0.1 µF
0.1 µF
I/O Supply
I/O Supply
Domain
Digital
2
C regulator, and a hibernate regulator.
Figure 6-4. PSoC Power System
1 µF
Regulators
Digital
0.1 µF
Vddd
Vddd
0.1 µF
I/O Supply
Regulator
Regulator
Regulator
Hibernate
Regulator
Analog
Domain
Analog
Sleep
I2C
I/O Supply
PSoC
0.1 µF
Vddio0
®
Vdda
Vcca
Vssa
Vddio3
3: CY8C38 Family
Figure
Vddio0
6-4. The two Vccd
1 µF
0.1 µF
Data Sheet
Vdda
Page 29 of 129
0.1 µF
.
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