CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 109
CP80617004119AES LBU3
Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet
1.CP80617004119AES_LBU3.pdf
(388 pages)
Specifications of CP80617004119AES LBU3
Lead Free Status / RoHS Status
Compliant
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Processor Configuration Registers
Datasheet
17:16
15:14
13:0
Bit
Access
RW
RW
RW
00110000
110000b
Default
Value
00b
00b
DRAM Refresh High Watermark (REFHIGHWM)
When the refresh count exceeds this level, a refresh request
is launched to the scheduler and the dref_high flag is set.
DRAM Refresh Low Watermark (REFLOWWM)
When the refresh count exceeds this level, a refresh request
is launched to the scheduler and the dref_low flag is set.
Refresh Counter Time Out Value (REFTIMEOUT)
At various mclk freq's this results in the following values:
00: 3
01: 4
10: 5
11: 6
00: 1
01: 2
10: 3
11: 4
400 MHz -> C30 hex
533 MHz -> 104B hex
666 MHz -> 1450 hex
(Sheet 3 of 3)
Description
109
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