CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 6

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

6
1.14
1.15
1.13.18PMLIMIT1 - Prefetchable Memory Limit Address ........................................ 164
1.13.19PMBASEU1 - Prefetchable Memory Base Address Upper.............................. 165
1.13.20PMLIMITU1 - Prefetchable Memory Limit Address Upper ............................. 165
1.13.21CAPPTR1 - Capabilities Pointer................................................................ 166
1.13.22INTRLINE1 - Interrupt Line .................................................................... 167
1.13.23INTRPIN1 - Interrupt Pin........................................................................ 167
1.13.24BCTRL1 - Bridge Control ........................................................................ 168
1.13.25PM_CAPID1 - Power Management Capabilities .......................................... 170
1.13.26PM_CS1 - Power Management Control/Status ........................................... 171
1.13.27SS_CAPID - Subsystem ID and Vendor ID Capabilities ............................... 173
1.13.28SS - Subsystem ID and Subsystem Vendor ID .......................................... 173
1.13.29MSI_CAPID - Message Signaled Interrupts Capability ID ............................ 174
1.13.30MC - Message Control............................................................................ 174
1.13.31MA - Message Address........................................................................... 175
1.13.32MD - Message Data ............................................................................... 176
1.13.33PEG_CAPL - PCI Express-G Capability List ................................................ 176
1.13.34PEG_CAP - PCI Express-G Capabilities ..................................................... 177
1.13.35DCAP - Device Capabilities ..................................................................... 178
1.13.36DCTL - Device Control ........................................................................... 179
1.13.37DSTS - Device Status ............................................................................ 180
1.13.38LCAP - Link Capabilities ......................................................................... 181
1.13.39LCTL - Link Control ............................................................................... 185
1.13.40LSTS - Link Status ................................................................................ 187
1.13.41SLOTCAP - Slot Capabilities.................................................................... 189
1.13.42SLOTCTL - Slot Control .......................................................................... 191
1.13.43SLOTSTS - Slot Status........................................................................... 193
1.13.44RCTL - Root Control .............................................................................. 196
1.13.45RSTS - Root Status ............................................................................... 197
1.13.46LCTL2 - Link Control 2 ........................................................................... 198
1.13.47LSTS2 - Link Status 2............................................................................ 200
1.13.48PEGLC - PCI Express-G Legacy Control .................................................... 201
PCI Device1 - Extended Configuration................................................................. 202
1.14.1 VCECH - Virtual Channel Enhanced Capability Header ................................ 202
1.14.2 PVCCAP1 - Port VC Capability Register 1 .................................................. 203
1.14.3 PVCCAP2 - Port VC Capability Register 2 .................................................. 204
1.14.4 PVCCTL - Port VC Control....................................................................... 204
1.14.5 VC0RCAP - VC0 Resource Capability ........................................................ 205
1.14.6 VC0RCTL - VC0 Resource Control ............................................................ 206
1.14.7 VC0RSTS - VC0 Resource Status............................................................. 207
1.14.8 PEGSSTS - PCI Express-G Sequence Status.............................................. 208
1.14.9 PEGTXDEMPSEL - PEG Transmit De-Emphasis Select Register ..................... 208
DMIBAR ......................................................................................................... 211
1.15.1 DMIVCECH - DMI Virtual Channel Enhanced Capability ............................... 212
1.15.2 DMIPVCCAP1 - DMI Port VC Capability Register 1 ...................................... 213
1.15.3 DMIPVCCAP2 - DMI Port VC Capability Register 2 ...................................... 213
1.15.4 DMIPVCCTL - DMI Port VC Control........................................................... 214
1.15.5 DMIVC0RCAP - DMI VC0 Resource Capability ............................................ 214
1.15.6 DMIVC0RCTL0 - DMI VC0 Resource Control .............................................. 215
1.15.7 DMIVC0RSTS - DMI VC0 Resource Status................................................. 216
1.15.8 DMIVC1RCAP - DMI VC1 Resource Capability ............................................ 217
1.15.9 DMIVC1RCTL1 - DMI VC1 Resource Control .............................................. 218
1.15.10DMIVC1RSTS - DMI VC1 Resource Status................................................. 219
1.15.11DMILCAP - DMI Link Capabilities ............................................................. 220
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