CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 131
CP80617004119AES LBU3
Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet
1.CP80617004119AES_LBU3.pdf
(388 pages)
Specifications of CP80617004119AES LBU3
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Processor Configuration Registers
1.10.15
Datasheet
EXTTSCS - External Thermal Sensor Control and Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Bit
15
14
13
12
11
Access
RW-O
RW-L
RW-L
RW-L
RO
Default
Value
0b
0b
0b
0b
0b
External Sensor Enable (ESE)
Setting this bit to 1 locks the lockable bits in this register.
This bit may only be set to a zero by a hardware reset. Once
locked, writing a 0 to bit has no effect. EXTTS0 and EXTTS1
input signal pins are dedicated for external thermal sensor
use.
An asserted External Thermal Sensor Trip signal can also
cause a SCI, SMI, SERR or INTR interrupt in the same
manner as the Internal Sensor can. A 0 on the pins can be
used to trigger throttling.
If both internal sensor throttling and external sensor
throttling are enabled, either can initiate throttling. The AS0
and AS1 bits of this register allow control of what action is
triggered by external sensor trips. The memory controller
Throttling select bit controls the type of throttling action that
will happen, and the {AS0, AS1} bits control what trip
actions will result.
0 = External Sensor input is disabled.
1 = External Sensor input is enabled.
Reserved
Select between EXTTS PIN 0 and 1 (EXTTPINSEL)
0 = Use EXTTS Pin 0 for Thermal throttling, based of
1 = Use EXTTS Pin 1 for the above.
EXTTS Based Power Monitor Trip (EXTTPMTRIP)
When this bit is 1, EXTTS Bit 0 can be programmed to look
like a power-monitor trip
Force DDR on EXTTS bit (EXTTFMX)
Enables forcing of DDR and PEG to specified MX state in
registers EXTTSMXST when the selected EXTTS Bit 0 or
1(from EXTTPINSEL field) is asserted.
• Will be OR’ed with the Global monitor/Gfx monitor so
• EXTTS# is only sampled on the sampling window for
0/0/0/MCHBAR
10EC-10EDh
0000h
RO; RW-O; RW-L
16 bits
that, when programmed for gfx throttle, when EXTTS#
is asserted at the sample point, it will look like a monitor
trip and force RP down by the programmed amount
graphics throttling, so even if both the Gfx monitor and
global monitor are disabled, the sampling window must
be programmed in order to have EXTTS# work as a
graphics throttle
EXTTPMTRIP, EXTTFMX and SD2X.
(Sheet 1 of 2)
Description
131
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