CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 218

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

1.15.9
218
DMIVC1RCTL1 - DMI VC1 Resource Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Controls the resources associated with PCI Express Virtual Channel 1.
30:27
26:24
23:20
19:17
16:8
Bit
31
Access
RW
RW
RW
RO
RO
RO
Default
Value
001b
000b
000h
0b
0h
0h
Virtual Channel Enable (VCE)
0 = Virtual Channel is disabled.
1 = Virtual Channel is enabled. See exceptions below.
Software must use the VC Negotiation Pending bit to check
whether the VC negotiation is complete. When VC
Negotiation Pending bit is cleared, a 1 read from this VC
Enable bit indicates that the VC is enabled (Flow Control
Initialization is completed for the PCI Express port). A 0
read from this bit indicates that the Virtual Channel is
currently disabled.
BIOS Requirement:
1. To enable a Virtual Channel, the VC Enable bits for that
Virtual Channel must be set in both Components on a Link.
2. To disable a Virtual Channel, the VC Enable bits for that
Virtual Channel must be cleared in both Components on a
Link.
3. Software must ensure that no traffic is using a Virtual
Channel at the time it is disabled.
4. Software must fully disable a Virtual Channel in both
Components on a Link before re-enabling the Virtual
Channel.
Reserved
Virtual Channel ID (VCID)
Assigns a VC ID to the VC resource. Assigned value must be
non-zero. This field can not be modified when the VC is
already enabled.
Reserved
Port Arbitration Select (PAS)
Configures the VC resource to provide a particular Port
Arbitration service. Valid value for this field is a number
corresponding to one of the asserted bits in the Port
Arbitration Capability field of the VC resource.
Reserved
0/0/0/DMIBAR
20-23h
01000000h
RO; RW
32 bits
(Sheet 1 of 2)
Processor Configuration Registers
Description
Datasheet