XCV50-6TQ144C Xilinx Inc, XCV50-6TQ144C Datasheet - Page 30

• Manufacturer Part Number: XCV50-6TQ144C
• Description: IC FPGA 2.5V C-TEMP 144-TQFP
• Manufacturer: Xilinx Inc
• Series: Virtex™r

Specifications of XCV50-6TQ144C

• Number Of Logic Elements/cells: 1728
• Number Of Labs/clbs: 384
• Total Ram Bits: 32768
• Number Of I /o: 98
• Number Of Gates: 57906
• Voltage - Supply: 2.375 V ~ 2.625 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 144-LQFP
• Case: TQFP144
• Dc: 03+
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Virtex™ 2.5 V Field Programmable Gate Arrays
Module 3 of 4
6
Notes:
1.
2.
Setup and Hold Times with respect to Clock CLK at IOB input
register
Pad, no delay
Pad, with delay
ICE input
Set/Reset Delays
SR input (IFF, synchronous)
SR input to IQ (asynchronous)
GSR to output IQ
A Zero "0" Hold Time listing indicates no hold time or a negative hold time. Negative values cannot be guaranteed "best-case", but
if a "0" is listed, there is no positive hold time.
Input timing for LVTTL is measured at 1.4 V. For other I/O standards, see
(1)
Description
XCV1000
XCV100
XCV150
XCV200
XCV300
XCV400
XCV600
XCV800
Device
XCV50
All
All
All
All
All
T
T
T
IOPICKD
IOICECK
IOPICK
www.xilinx.com
T
1-800-255-7778
Symbol
T
T
IOSRCKI
IOSRIQ
GSRQ
/T
/T
/T
IOICKP
IOICKPD
IOCKICE
Table
0.37/ 0
0.8 / 0
1.9 / 0
1.9 / 0
1.9 / 0
2.0 / 0
2.0 / 0
2.1 / 0
2.1 / 0
2.2 / 0
2.3 / 0
0.49
0.70
Min
4.9
3.
1.6 / 0
3.7 / 0
3.7 / 0
3.8 / 0
3.9 / 0
3.9 / 0
4.1 / 0
4.2 / 0
4.4 / 0
4.5 / 0
0.8 / 0
Speed Grade
1.0
1.4
9.7
Setup Time / Hold Time
-6
DS003-3 (v3.2) September 10, 2002
Production Product Specification
1.8 / 0
4.1 / 0
4.1 / 0
4.3 / 0
4.4 / 0
4.4 / 0
4.6 / 0
4.7 / 0
4.9 / 0
5.0 / 0
0.9 / 0
10.9
1.1
1.6
-5
2.0 / 0
4.7 / 0
4.7 / 0
4.9 / 0
5.0 / 0
5.0 / 0
5.3 / 0
5.4 / 0
5.6 / 0
5.8 / 0
1.0 / 0
12.5
1.3
1.8
-4
ns, max
ns, max
ns, max
ns, max
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
Units
R