XCV50-6TQ144C Xilinx Inc, XCV50-6TQ144C Datasheet - Page 44

• Manufacturer Part Number: XCV50-6TQ144C
• Description: IC FPGA 2.5V C-TEMP 144-TQFP
• Manufacturer: Xilinx Inc
• Series: Virtex™r

Specifications of XCV50-6TQ144C

• Number Of Logic Elements/cells: 1728
• Number Of Labs/clbs: 384
• Total Ram Bits: 32768
• Number Of I /o: 98
• Number Of Gates: 57906
• Voltage - Supply: 2.375 V ~ 2.625 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 144-LQFP
• Case: TQFP144
• Dc: 03+
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Virtex™ 2.5 V Field Programmable Gate Arrays
Global Clock Set-Up and Hold for LVTTL Standard, without DLL
Module 3 of 4
20
Notes: Notes:
1.
2.
Input Setup and Hold Time Relative to Global Clock Input Signal for LVTTL Standard.
standards, adjust the setup time delay by the values shown in Input Delay Adjustments.
Full Delay
Global Clock and IFF, without
DLL
IFF = Input Flip-Flop or Latch
Set-up time is measured relative to the Global Clock input signal with the fastest route and the lightest load. Hold time is measured
relative to the Global Clock input signal with the slowest route and heaviest load.
A Zero "0" Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed "best-case", but
if a "0" is listed, there is no positive hold time.
Description
T
PSFD
Symbol
/T
PHFD
www.xilinx.com
1-800-255-7778
XCV1000
XCV100
XCV150
XCV200
XCV300
XCV400
XCV600
XCV800
Device
XCV50
0.6 / 0
0.6 / 0
0.6 / 0
0.7 / 0
0.7 / 0
0.7 / 0
0.7 / 0
0.7 / 0
0.7 / 0
Min
2.3 / 0
2.3 / 0
2.4 / 0
2.5 / 0
2.5 / 0
2.6 / 0
2.6 / 0
2.7 / 0
2.8 / 0
Speed Grade
-6
(2)
For data input with different
DS003-3 (v3.2) September 10, 2002
Production Product Specification
2.6 / 0
2.6 / 0
2.7 / 0
2.8 / 0
2.8 / 0
2.9 / 0
2.9 / 0
3.1 / 0
3.1 / 0
-5
2.9 / 0
3.0 / 0
3.1 / 0
3.2 / 0
3.2 / 0
3.3 / 0
3.3 / 0
3.5 / 0
3.6 / 0
-4
Units
min
min
min
min
min
min
min
min
min
ns,
ns,
ns,
ns,
ns,
ns,
ns,
ns,
ns,
R