XCV50-6TQ144C Xilinx Inc, XCV50-6TQ144C Datasheet - Page 47

• Manufacturer Part Number: XCV50-6TQ144C
• Description: IC FPGA 2.5V C-TEMP 144-TQFP
• Manufacturer: Xilinx Inc
• Series: Virtex™r

Specifications of XCV50-6TQ144C

• Number Of Logic Elements/cells: 1728
• Number Of Labs/clbs: 384
• Total Ram Bits: 32768
• Number Of I /o: 98
• Number Of Gates: 57906
• Voltage - Supply: 2.375 V ~ 2.625 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 144-LQFP
• Case: TQFP144
• Dc: 03+
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Virtex Data Sheet
The Virtex Data Sheet contains the following modules:
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DS003-3 (v3.2) September 10, 2002
Production Product Specification
04/02/01
04/19/01
07/19/01
07/26/01
10/29/01
02/01/02
07/19/02
09/10/02
DS003-1, Virtex 2.5V FPGAs:
Introduction and Ordering Information (Module 1)
DS003-2, Virtex 2.5V FPGAs:
Functional Description (Module 2)
01/00
03/00
05/00
05/00
09/00
10/00
Date
R
Version
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
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Updated DLL Jitter Parameter table and waveforms, added Delay Measurement
Methodology table for different I/O standards, changed buffered Hex line info and
Input/Output Timing measurement notes.
New TBCKO values; corrected FG680 package connection drawing; new note about status
of CCLK pin after configuration.
Modified "Pins not listed ..." statement. Speed grade update to Final status.
Modified Table 18.
Added XCV400 values to table under Minimum Clock-to-Out for Virtex Devices.
Corrected Units column in table under IOB Input Switching Characteristics.
Added values to table under CLB SelectRAM Switching Characteristics.
Corrected Pinout information for devices in the BG256, BG432, and BG560 packages in
Table 18.
Corrected BG256 Pin Function Diagram.
Revised minimums for Global Clock Set-Up and Hold for LVTTL Standard, with DLL.
Converted file to modularized format. See the
Clarified
Under
Removed T
Updated the speed grade designations used in data sheets, and added
shows the current speed grade designation for each device.
Added footnote to
Removed mention of MIL-M-38510/605 specification.
Added link to xapp158 from the
Added Clock CLK to
Characteristics.
Absolute Maximum
TIOCKP
SOL
parameter and added footnote to
and
DC Input and Output Levels
www.xilinx.com
1-800-255-7778
IOB Input Switching Characteristics
TIOCKON
Ratings, changed (T
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IOB Output Switching Characteristics
Power-On Power Supply Requirements
DS003-3, Virtex 2.5V FPGAs:
DC and Switching Characteristics (Module 3)
DS003-4, Virtex 2.5V FPGAs:
Pinout Tables (Module 4)
Revision
Virtex™ 2.5 V Field Programmable Gate Arrays
Virtex Data Sheet
table.
SOL
Absolute Maximum Ratings
) to 220 °C .
and
IOB Output Switching
section.
Table
descriptors.
section.
Module 3 of 4
1, which
table.
23