XE8805AMI028LF Semtech, XE8805AMI028LF Datasheet - Page 148

IC DAS 16BIT FLASH 8K MTP 64LQFP

XE8805AMI028LF

Manufacturer Part Number
XE8805AMI028LF
Description
IC DAS 16BIT FLASH 8K MTP 64LQFP
Manufacturer
Semtech
Datasheet

Specifications of XE8805AMI028LF

Applications
Sensing Machine
Core Processor
RISC
Program Memory Type
FLASH (22 kB)
Controller Series
XE8000
Ram Size
512 x 8
Interface
UART, USRT
Number Of I /o
24
Voltage - Supply
2.4 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Supply Voltage Range
2.4V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LQFP
No. Of Pins
64
For Use With
XE8000MP - PROG BOARD AND PROSTART2 CARD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Manufacturer
Quantity
Price
Part Number:
XE8805AMI028LF
Manufacturer:
Semtech
Quantity:
10 000
Part Number:
XE8805AMI028LF
Manufacturer:
SEMTECH/美国升特
Quantity:
20 000
20.10 PWM mode
The counters can generate PWM signals (Pulse Width Modulation) on the Port B outputs PB(0) and PB(1).
The PWM mode is selected by setting CntPWM1 and CntPWM0 in the RegCntConfig1 register. See Table 20-11
and Table 20-12 for an exact description of how the setting of CntPWM1 and CntPWM0 affects the operating
mode of the counters A, B, C and D according to the other configuration settings.
When CntPWM0 is enabled, the PWMA or PWMAB output value overrides the value set in bit 0 of RegPBOut in
the Port B peripheral. When CntPWM1 is enabled, the PWMC or PWMCD output value overrides the value set in
bit 1 of RegPBOut. The corresponding ports (0 and/or 1) of Port B must be set in digital mode and as output and
either open drain or not and pull up or not through a proper setting of the control registers of the Port B.
Counters in PWM mode always count down, the CntXDownUp bit setting must be reset. No interrupts and events
are generated by the counters which are in PWM mode. Counters do count circularly: they restart at the maximal
value (either 0xFF when not cascaded or 0xFFFF when cascaded) when respectively an underflow condition
occurs in the counting.
The internal PWM signals are low as long as the counter contents are higher than the PWM code values written in
the RegCntX registers. They are high when the counter contents are smaller or equal to these PWM code values.
The PWM resolution is always 8 bits when the counters used for the PWM signal generation are not cascaded.
PWM0Size(1:0) and PWM1Size(1:0) in the RegCntConfig2 register are used to set the PWM resolution for the
counters A and B or C and D respectively when they are in cascaded mode. The different possible resolutions in
cascaded mode are shown in Table 20-13. Choosing a 16 bit PWM code higher than the maximum value that can
be represented by the number of bits chosen for the resolution, results in a PWM output which is always tied to 1.
The period of the PWM signal is given by the formula:
© Semtech 2006
Small PWM code
Large PWM code
Table 20-13: Resolution selection in cascaded PWM mode
PwmXsize(1:0)
Figure 20-3: PWM modulation examples
11
10
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T
Resolution
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16 bits
14 bits
12 bits
10 bits
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XE8805/05A
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