XE8805AMI028LF Semtech, XE8805AMI028LF Datasheet - Page 82

• Manufacturer Part Number: XE8805AMI028LF
• Description: IC DAS 16BIT FLASH 8K MTP 64LQFP
• Manufacturer: Semtech

Specifications of XE8805AMI028LF

• Applications: Sensing Machine
• Core Processor: RISC
• Program Memory Type: FLASH (22 kB)
• Controller Series: XE8000
• Ram Size: 512 x 8
• Interface: UART, USRT
• Number Of I /o: 24
• Voltage - Supply: 2.4 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Supply Voltage Range: 2.4V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• For Use With: XE8000MP - PROG BOARD AND PROSTART2 CARD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.1 Features
The USRT implements a hardware support for software implemented serial protocols:
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15.2 Overview
The USRT block supports software universal synchronous receiver and transmitter mode interfaces.
External lines S0 and S1 respectively correspond to clock line and data line. S0 is mapped to PB[4] and S1 to
PB[5] when the USRT block is enabled. It is independent from RegPBdir (Port B can be input or output). When
USRT is enabled, the configurations in port B for PB[4] and PB[5] are overwritten by the USRT configuration.
Internal pull-ups can be used by setting the PBPullup[5:4] bits.
Conditional edge detections are provided.
RegUsrtS1 can be used to read the S1 data line from PB[5] in receive mode or to drive the output S1 line PB[5] by
writing it when in transmit mode. It is advised to read S1 data when in receive mode from the RegUsrtBufferS1
register, which is the S1 value sampled on a rising edge of S0.
15.3 Register map
Block configuration registers:
The values that are read in the registers RegUsrtS1 and RegUsrtS0 are not necessarily the same as the values
that were written in the register. The read value is read back on the circuit pins, not in the registers. Since the
outputs are open drain, a value different from the register value may be forced by an external circuit on the circuit
pins.
© Semtech 2006
Control of two external lines S0 and S1 (read/write).
Conditional edge detection generates interrupts.
S0 rising edge detection.
S1 value is stored on S0 rising edge.
S0 signal can be forced to 0 after a falling edge on S0 for clock stretching in the low state.
S0 signal can be stretched in the low state after a falling edge on S0 and after a S1 conditional detection.
7-1
0
7-1
0
pos.
pos.
-
UsrtS1
-
UsrtS0
RegUsrtS0
RegUsrtS1
r
rw
r
rw
rw
rw
0000000
1 resetsystem
0000000
1 resetsystem
Table 15-1: RegUsrtS1
Table 15-2: RegUsrtS0
Reset
reset
15-2
Unused
Write: data S1 written to pad PB[5]),
Read: value on PB[5] (not UsrtS1 value).
Unused
Write: clock S0 written to pad PB[4],
Read: value on PB[4] (not UsrtS0 value).
function
function
XE8805/05A
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