XE8805AMI028LF Semtech, XE8805AMI028LF Datasheet - Page 63

• Manufacturer Part Number: XE8805AMI028LF
• Description: IC DAS 16BIT FLASH 8K MTP 64LQFP
• Manufacturer: Semtech

Specifications of XE8805AMI028LF

• Applications: Sensing Machine
• Core Processor: RISC
• Program Memory Type: FLASH (22 kB)
• Controller Series: XE8000
• Ram Size: 512 x 8
• Interface: UART, USRT
• Number Of I /o: 24
• Voltage - Supply: 2.4 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Supply Voltage Range: 2.4V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• For Use With: XE8000MP - PROG BOARD AND PROSTART2 CARD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.5 Port A (PA) Operation
The Port A input status (debounced or not) can be read from RegPAin.
Debounce mode:
Each bit in Port A can be individually debounced by setting the corresponding bit in RegPADebounce. After reset,
the debounce function is disabled. After enabling the debouncer, the change of the input value is accepted only if
the input value is identical at two consecutive sampling on the rising edge of the selected clock. Selection of the
clock is done by the bit DebFast in Register RegSysMisc (see clock block documentation for more precision on
the frequency).
Pull-ups:
When the corresponding bit in RegPAPullup is set to 0, the inputs are floating (pull-up resistors are disconnected).
When the corresponding bit in RegPAPullup is set to 1, a pull-up resistor is connected to the input pin. Port A
starts up with the pull-up resistors disconnected.
Port A as an interrupt source:
Each Port A input is an interrupt request source and can be set on rising or falling edge with the corresponding bit
in RegPAEdge. After reset, the rising edge is selected for interrupt generation by default. The interrupt source can
be debounced by setting register RegPADebounce.
Note: care must be taken when modifying RegPAEdge because this register performs an edge selection. The
change of this register may result in a transition which may be interpreted as a valid interruption.
Port A as an event source:
The interrupt signals of the pins PA[0] and PA[1] are also available as events on the event controller.
Port A as a clock source (product dependent):
Images of the PA[0] to PA[3] input ports (debounced or not) are available as clock sources for the
counter/timer/PWM peripheral (see the counter block documentation for more information).
Port A as a reset source:
Port A can be used to generate a system reset by placing a predetermined word on Port A externally. The reset is
built using a logical and of the 8 PARes[x] signals:
PAReset[x] is itself a logical function of the corresponding pin PA[x]. One of four logical functions can be selected
for each pin by writing into two registers RegPARes0 and RegPARes1 as shown in Table 11-8.
© Semtech 2006
CkDebounce
Debounced
resetfromportA = PAReset[7] AND PAReset[6] AND PAReset[5] AND ... AND PAReset[0]
Input
DebFast
Table 11-7: debounce frequency selection
0
1
Figure 11-2: digital debouncer
1
1
11-4
2
Clock filter
256 Hz
8 kHz
1
1
2
XE8805/05A
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