XE8805AMI028LF Semtech, XE8805AMI028LF Datasheet - Page 52

IC DAS 16BIT FLASH 8K MTP 64LQFP

XE8805AMI028LF

Manufacturer Part Number
XE8805AMI028LF
Description
IC DAS 16BIT FLASH 8K MTP 64LQFP
Manufacturer
Semtech
Datasheet

Specifications of XE8805AMI028LF

Applications
Sensing Machine
Core Processor
RISC
Program Memory Type
FLASH (22 kB)
Controller Series
XE8000
Ram Size
512 x 8
Interface
UART, USRT
Number Of I /o
24
Voltage - Supply
2.4 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Supply Voltage Range
2.4V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LQFP
No. Of Pins
64
For Use With
XE8000MP - PROG BOARD AND PROSTART2 CARD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XE8805AMI028LF
Manufacturer:
Semtech
Quantity:
10 000
Part Number:
XE8805AMI028LF
Manufacturer:
SEMTECH/美国升特
Quantity:
20 000
8.1 Features
The XE8000 chips support 24 interrupt sources, divided into 3 levels of priority.
8.2 Overview
A CPU interruption is generated and memorized when an interrupt becomes active. The 24 interrupt sources are
divided into 3 levels of priority: High (8 interrupt sources), Mid (8 interrupt sources), and Low (8 interrupt sources).
Those 3 levels of priority are directly mapped to those supported by the CoolRisc® (IN0, IN1 and IN2; see
CoolRisc® documentation for more information).
RegIrqHig, RegIrqMid, and RegIrqLow are 8-bit registers containing flags for the interrupt sources. Those flags
are set when the interrupt is enabled (i.e. if the corresponding bit in the registers RegIrqEnHig, RegIrqEnMid or
RegIrqEnLow is set) and a rising edge is detected on the corresponding interrupt source.
Once memorized, an interrupt flag can be cleared by writing a ‘1’ in the corresponding bit of RegIrqHig, RegIrqMid
or RegIrqLow. Writing a ‘0’ does not modify the flag. To definitively clear the interrupt, one has to clear the
CoolRisc interrupt in the CoolRisc status register. All interrupts are automatically cleared after a reset.
Two registers are provided to facilitate the writing of interrupt service software. RegIrqPriority contains the number
of the highest priority interrupt set (its value is 0xFF when no interrupt is set). RegIrqIrq indicates the priority level
of the current interrupts. RegIrqIrq and RegIrqPriority ‘s values are dependent upon the memorized state of the
interrupts (as reflected in flags in RegIrqHig, RegIrqMid and RegIrqLow).
8.3 Register map
© Semtech 2006
7
6
5
4
3
2
1
0
pos.
RegIrqHig[7]
RegIrqHig[6]
RegIrqHig[5]
RegIrqHig[4]
RegIrqHig[3]
RegIrqHig[2]
RegIrqHig[1]
RegIrqHig[0]
RegIrqHig
r
c1
r
c1
r
c1
r
c1
r
c1
r
c1
r
c1
r
c1
rw
Table 8-1: RegIrqHig
0 resetsystem
0 resetsystem
0 resetsystem
0 resetsystem
0 resetsystem
0 resetsystem
0 resetsystem
0 resetsystem
reset
8-2
interrupt #23 (high priority)
interrupt #22 (high priority)
interrupt #21 (high priority)
interrupt #20 (high priority)
interrupt #19 (high priority)
interrupt #18 (high priority)
interrupt #17 (high priority)
interrupt #16 (high priority)
clear interrupt #23 when 1 is written
clear interrupt #22 when 1 is written
clear interrupt #21 when 1 is written
clear interrupt #20 when 1 is written
clear interrupt #19 when 1 is written
clear interrupt #18 when 1 is written
clear interrupt #17 when 1 is written
clear interrupt #16 when 1 is written
function
XE8805/05A
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