XE8805AMI028LF Semtech, XE8805AMI028LF Datasheet - Page 23

• Manufacturer Part Number: XE8805AMI028LF
• Description: IC DAS 16BIT FLASH 8K MTP 64LQFP
• Manufacturer: Semtech

Specifications of XE8805AMI028LF

• Applications: Sensing Machine
• Core Processor: RISC
• Program Memory Type: FLASH (22 kB)
• Controller Series: XE8000
• Ram Size: 512 x 8
• Interface: UART, USRT
• Number Of I /o: 24
• Voltage - Supply: 2.4 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Supply Voltage Range: 2.4V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• For Use With: XE8000MP - PROG BOARD AND PROSTART2 CARD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Sflag
Rflag
Rflag
Freq divn
Halt
Nop
- = unchanged, u = undefined, *MSHR reg,# 1 doesn’t shift by 1
Table 3-4. Instruction short reference
The Coolrisc816 has 8 different addressing modes. These modes are described in Table 3-5. In this table, the
notation ix refers to one of the data memory index registers i0, i1, i2 or i3. Using
will access the data memory at the address
Table 3-5. Extended address mode description
Eleven different jump conditions are implemented as shown in Table 3-6. The contents of the column
table should replace the
CC
CS
CC
ZS
ZC
VS
VC
EV
EQ
NE
GT
GE
LT
LE
Table 3-6. Jump condition description
© Semtech 2006
extended address
(ix,offset[7:0])+
(ix, offset[7:0])
-(ix,offset[7:0])
After CMP op1,op2
addr[7:0]
reg
eaddr
eaddr
(ix,r3)
(ix)+
-(ix)
(ix)
(EV1 or EV0)=1
condition
op1=op2
op1≠op2
op1>op2
op1≥op2
op1<op2
op1≤op2
C=1
C=0
Z=1
Z=0
V=1
V=0
accessed data memory
DM(h00&addr[7:0])
DM(ix+offset)
DM(ix+offset)
DM(ix-offset)
DM(eaddr)
DM(ix+r3)
DM(ix-1)
-,-,-, a
C, V, Z, a
C, V, Z, a
-,-,-, -
-,-,-, -
-,-,-, -
location
CC
DM(ix)
DM(ix)
notation in the instruction description of Table 3-4.
ix := ix+offset
ix := ix -offset
a[7] := C; a[6] := C xor V; a[5] := ST full; a[4] := ST empty
a :=
a := DM(eaddr)<<1; a[0] :=0; C :=
reduces the CPU frequency (divn=nodiv, div2, div4, div8, div16)
halts the CPU
no operation
operation
ix := ix+1
ix := ix-1
index
reg
DM(eaddr)
-
-
-
-
<< 1; ; a[0] := 0; C :=
direct addressing
indexed addressing
indexed addressing with immediate offset
indexed addressing with register offset
indexed addressing with index post-increment
indexed addressing with index pre-decrement
indexed addressing with index pre-decrement by the offset
indexed addressing with index post-increment by the offset
and will simultaneously execute the index operation.
3-6
reg[7]
DM(eaddr)[7]
eaddr
in an instruction of Table 3-4
XE8805/05A
www.semtech.com
CC
in this