PIC16F887-I/PT Microchip Technology Inc., PIC16F887-I/PT Datasheet - Page 122

• Manufacturer Part Number: PIC16F887-I/PT
• Description: MCU, 8-Bit, 8KW Flash, 368 RAM, 36 I/O, TQFP-44
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F887-I/PT

• A/d Inputs: 14-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Frequency: 20 MHz
• Input Output: 35
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TFQP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Resistance, Drain To Source On: Bytes
• Serial Interface: MSSP or EUSART
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F882/883/884/886/887
10.3
Depending on the application, good programming
practice may dictate that the value written to the data
EEPROM should be verified (see Example 10-5) to the
desired value to be written.
EXAMPLE 10-5:
10.3.1
The data EEPROM is a high-endurance, byte
addressable array that has been optimized for the
storage of frequently changing information (e.g.,
program variables or other data that are updated often).
When variables in one section change frequently, while
variables in another section do not change, it is possible
to exceed the total number of write cycles to the
EEPROM (specification D124) without exceeding the
total number of write cycles to a single byte
(specifications D120 and D120A). If this is the case,
then a refresh of the array must be performed. For this
reason, variables that change infrequently (such as
constants, IDs, calibration, etc.) should be stored in
Flash program memory.
10.4
There are conditions when the user may not want to
write to the data EEPROM memory. To protect against
spurious EEPROM writes, various mechanisms have
been built in. On power-up, WREN is cleared. Also, the
Power-up
EEPROM write.
The write initiate sequence and the WREN bit together
help prevent an accidental write during:
• Brown-out
• Power Glitch
• Software Malfunction
10.5
Data memory can be code-protected by programming
the CPD bit in the Configuration Word Register 1
(Register 14-1) to ‘0’.
DS41291D-page 120
BANKSEL EEDAT
MOVF
BANKSEL EECON1
BSF
BANKSEL EEDAT
XORWF
BTFSS
GOTO
:
BCF
Write Verify
Protection Against Spurious Write
Data EEPROM Operation During
Code-Protect
EEDAT, W
EECON1, RD
EEDAT, W
STATUS, Z
WRITE_ERR
STATUS, RP1
USING THE DATA EEPROM
Timer
WRITE VERIFY
(64 ms
;
;EEDAT not changed
;from previous write
;
;YES, Read the
;value written
;
;
;Is data the same
;No, handle error
;Yes, continue
;Bank 0
duration)
prevents
Preliminary
When the data memory is code-protected, only the
CPU is able to read and write data to the data
EEPROM. It is recommended to code-protect the pro-
gram memory when code-protecting data memory.
This prevents anyone from programming zeroes over
the existing code (which will execute as NOPs) to reach
an added routine, programmed in unused program
memory, which outputs the contents of data memory.
Programming unused locations in program memory to
‘0’ will also help prevent data memory code protection
from becoming breached.
© 2007 Microchip Technology Inc.