PIC16F887-I/PT Microchip Technology Inc., PIC16F887-I/PT Datasheet - Page 194

• Manufacturer Part Number: PIC16F887-I/PT
• Description: MCU, 8-Bit, 8KW Flash, 368 RAM, 36 I/O, TQFP-44
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F887-I/PT

• A/d Inputs: 14-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Frequency: 20 MHz
• Input Output: 35
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TFQP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Resistance, Drain To Source On: Bytes
• Serial Interface: MSSP or EUSART
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F882/883/884/886/887
13.4.6
To initiate a Start condition, the user sets the Start Con-
dition Enable bit SEN of the SSPCON2 register. If the
SDA and SCL pins are sampled high, the Baud Rate
Generator
SSPADD<6:0> and starts its count. If SCL and SDA are
both sampled high when the Baud Rate Generator
times out (T
of the SDA being driven low, while SCL is high, is the
Start condition, and causes the S bit of the SSPSTAT
register to be set. Following this, the Baud Rate Gener-
ator is reloaded with the contents of SSPADD<6:0>
and resumes its count. When the Baud Rate Generator
times out (T
will be automatically cleared by hardware, the Baud
Rate Generator is suspended leaving the SDA line held
low and the Start condition is complete.
FIGURE 13-13:
DS41291D-page 192
Note:
If, at the beginning of the Start condition,
the SDA and SCL pins are already sam-
pled low, or if during the Start condition the
SCL line is sampled low before the SDA
line is driven low, a bus collision occurs, the
Bus Collision Interrupt Flag, BCLIF, is set,
the Start condition is aborted, and the I
module is reset into its Idle state.
Write to SEN bit occurs here
I
CONDITION TIMING
BRG
BRG
2
is
C™ MASTER MODE START
), the SEN bit of the SSPCON2 register
), the SDA pin is driven low. The action
reloaded
FIRST START BIT TIMING
SDA
SCL
with
the
contents
SDA = 1,
SCL = 1
T
BRG
Preliminary
2
C
of
Set S bit (SSPSTAT)
T
S
BRG
At completion of Start bit,
hardware clears SEN bit
13.4.6.1
If the user writes the SSPBUF when a Start sequence
is in progress, the WCOL is set and the contents of the
buffer are unchanged (the write doesn’t occur).
and sets SSPIF bit
Note:
T
BRG
Write to SSPBUF occurs here
Because queueing of events is not
allowed, writing to the lower 5 bits of
SSPCON2 is disabled until the Start condi-
tion is complete.
1st Bit
WCOL Status Flag
T
BRG
© 2007 Microchip Technology Inc.
2nd Bit