PIC16F887-I/PT Microchip Technology Inc., PIC16F887-I/PT Datasheet - Page 127

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PIC16F887-I/PT

Manufacturer Part Number
PIC16F887-I/PT
Description
MCU, 8-Bit, 8KW Flash, 368 RAM, 36 I/O, TQFP-44
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F887-I/PT

A/d Inputs
14-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Frequency
20 MHz
Input Output
35
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TFQP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
MSSP or EUSART
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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11.2
The Capture/Compare/PWM module is a peripheral
which allows the user to time and control different
events. In Capture mode, the peripheral allows the
timing of the duration of an event. The Compare mode
allows the user to trigger an external event when a
predetermined amount of time has expired. The PWM
mode can generate a Pulse-Width Modulated signal of
varying frequency and duty cycle.
The timer resources used by the module are shown in
Table 11-2.
Additional information on CCP modules is available in
the Application Note AN594, “Using the CCP Modules”
(DS00594).
REGISTER 11-2:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
U-0
Capture/Compare/PWM (CCP2)
Unimplemented: Read as ‘0’
DC2B<1:0>: PWM Duty Cycle Least Significant bits
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR2L.
CCP2M<3:0>: CCP2 Mode Select bits
0000 = Capture/Compare/PWM off (resets CCP2 module)
0001 = Unused (reserved)
0010 = Unused (reserved)
0011 = Unused (reserved)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP2IF bit is set)
1001 = Compare mode, clear output on match (CCP2IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP2IF bit is set, CCP2 pin
1011 = Compare mode, trigger special event (CCP2IF bit is set, TMR1 is reset and A/D
11xx = PWM mode.
U-0
CCP2CON: CCP2 CONTROL REGISTER
is unaffected)
conversion is started if the ADC module is enabled. CCP2 pin is unaffected.)
W = Writable bit
‘1’ = Bit is set
DC2B1
R/W-0
PIC16F882/883/884/886/887
DC2B0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCP2M3
R/W-0
TABLE 11-2:
CCP Mode
Compare
Capture
PWM
CCP2M2
R/W-0
CCP MODE – TIMER
RESOURCES REQUIRED
x = Bit is unknown
CCP2M1
R/W-0
Timer Resource
DS41291D-page 125
Timer1
Timer1
Timer2
CCP2M0
R/W-0
bit 0

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