PIC16F887-I/PT Microchip Technology Inc., PIC16F887-I/PT Datasheet - Page 219
PIC16F887-I/PT
Manufacturer Part Number
PIC16F887-I/PT
Description
MCU, 8-Bit, 8KW Flash, 368 RAM, 36 I/O, TQFP-44
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F887-IPT.pdf
(288 pages)
Specifications of PIC16F887-I/PT
A/d Inputs
14-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Frequency
20 MHz
Input Output
35
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TFQP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
MSSP or EUSART
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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Part Number:
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14.3.2
An overflow (FFh → 00h) in the TMR0 register will set
the T0IF (INTCON<2>) bit. The interrupt can be
enabled/disabled by setting/clearing T0IE (INTCON<5>)
bit. See Section 5.0 “Timer0 Module” for operation of
the Timer0 module.
FIGURE 14-7:
© 2007 Microchip Technology Inc.
IOC-RB0
IOC-RB1
IOC-RB2
IOC-RB3
IOC-RB4
IOC-RB5
IOC-RB6
IOC-RB7
IOCB0
IOCB1
IOCB2
IOCB3
IOCB4
IOCB5
IOCB6
IOCB7
TIMER0 INTERRUPT
INTERRUPT LOGIC
ULPWUIF
ULPWUIE
TMR2IE
TMR1IF
TMR1IE
TMR2IF
CCP1IF
CCP1IE
CCP2IF
CCP2IE
BCLIF
BCLIE
OSFIF
OSFIE
SSPIF
SSPIE
RCIE
RCIF
ADIF
ADIE
TXIF
TXIE
C1IF
C1IE
C2IF
C2IE
EEIF
EEIE
PIC16F882/883/884/886/887
Preliminary
14.3.3
An input change on PORTB change sets the RBIF
(INTCON<0>) bit. The interrupt can be enabled/
disabled by setting/clearing the RBIE (INTCON<3>)
bit. Plus, individual pins can be configured through the
IOCB register.
Note:
Note 1:
RBIE
INTF
INTE
RBIF
PEIE
T0IF
T0IE
GIE
PORTB INTERRUPT
If a change on the I/O pin should occur
when the read operation is being executed
(start of the Q2 cycle), then the RBIF inter-
rupt
Section 3.4.3 “Interrupt-on-Change” for
more information.
Some peripherals depend upon the
system clock for operation. Since the
system clock is suspended during
Sleep, these peripherals will not wake
the part from Sleep. See Section 14.6.1
“Wake-up from Sleep”.
flag
Wake-up (If in Sleep mode)
may
not
DS41291D-page 217
Interrupt to CPU
get
set.
(1)
See
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