PIC16F887-I/PT Microchip Technology Inc., PIC16F887-I/PT Datasheet - Page 95

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PIC16F887-I/PT

Manufacturer Part Number
PIC16F887-I/PT
Description
MCU, 8-Bit, 8KW Flash, 368 RAM, 36 I/O, TQFP-44
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F887-I/PT

A/d Inputs
14-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Frequency
20 MHz
Input Output
35
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TFQP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
MSSP or EUSART
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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REGISTER 8-4:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-0
SR1
2:
(2)
The CxOUT bit in the CMxCON0 register will always reflect the actual comparator output (not the level on
the pin), regardless of the SR latch operation.
To enable an SR Latch output to the pin, the appropriate CxOE and TRIS bits must be properly
configured.
SR1: SR Latch Configuration bit
1 =
0 =
SR0: SR Latch Configuration bits
1 =
0 =
C1SEN: C1 Set Enable bit
1 = C1 comparator output sets SR latch
0 = C1 comparator output has no effect on SR latch
C2REN: C2 Reset Enable bit
1 = C2 comparator output resets SR latch
0 = C2 comparator output has no effect on SR latch
PULSS: Pulse the SET Input of the SR Latch bit
1 = Triggers pulse generator to set SR latch. Bit is immediately reset by hardware.
0 = Does not trigger pulse generator
PULSR: Pulse the Reset Input of the SR Latch bit
1 = Triggers pulse generator to reset SR latch. Bit is immediately reset by hardware.
0 = Does not trigger pulse generator
Unimplemented: Read as ‘0’
FVREN: Fixed Voltage Reference Enable bit
1 = 0.6V Reference FROM INTOSC LDO is enabled
0 = 0.6V Reference FROM INTOSC LDO is disabled
R/W-0
SR0
C2OUT pin is the latch Q output
C2OUT pin is the C2 comparator output
C1OUT pin is the latch Q output
C1OUT pin is the C1 Comparator output
SRCON: SR LATCH CONTROL REGISTER
(2)
W = Writable bit
‘1’ = Bit is set
C1SEN
R/W-0
PIC16F882/883/884/886/887
C2REN
(2)
R/W-0
(2)
Preliminary
S = Bit is set only -
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PULSS
R/S-0
PULSR
R/S-0
x = Bit is unknown
U-0
DS41291D-page 93
FVREN
R/W-0
bit 0

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