RC28F256P30TFB Micron Technology Inc, RC28F256P30TFB Datasheet - Page 31

• Manufacturer Part Number: RC28F256P30TFB
• Manufacturer: Micron Technology Inc

Specifications of RC28F256P30TFB

• Cell Type: NOR
• Density: 256Mb
• Access Time (max): 100ns
• Interface Type: Parallel/Serial
• Boot Type: Top
• Address Bus: 24b
• Operating Supply Voltage (typ): 1.8V
• Operating Temp Range: -40C to 85C
• Package Type: EZBGA
• Sync/async: Async/Sync
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 1.7V
• Operating Supply Voltage (max): 2V
• Word Size: 16b
• Number Of Words: 16M
• Supply Current: 31mA
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / Rohs Status: Not Compliant

P30-65nm
8.4
8.5
8.6
Datasheet
31
Program Suspend
Issuing the Program Suspend command while programming suspends the
programming operation. This allows data to be accessed from the device other than the
one being programmed. The Program Suspend command can be issued to any device
address. A program operation can be suspended to perform reads only. Additionally, a
program operation that is running during an erase suspend can be suspended to
perform a read operation (see
page
When a programming operation is executing, issuing the Program Suspend command
requests the WSM to suspend the programming algorithm at predetermined points. The
device continues to output Status Register data after the Program Suspend command is
issued. Programming is suspended when Status Register bits SR[7,2] are set. Suspend
latency is specified in
To read data from the device, the Read Array command must be issued. Read Array,
Read Status Register, Read Device Identifier, Read CFI, and Program Resume are valid
commands during a program suspend.
During a program suspend, deasserting CE# places the device in standby, reducing
active current. V
unchanged while in program suspend. If RST# is asserted, the device is reset.
Program Resume
The Resume command instructs the device to continue programming, and
automatically clears Status Register bits SR[7,2]. This command can be written to any
address. If error bits are set, the Status Register should be cleared before issuing the
next instruction. RST# must remain deasserted (see
Resume Flowchart” on page
Program Protection
When V
V
level error. Block lock registers are not affected by the voltage level on V
still be programmed and read, even if V
PP
is at or below V
79).
PP
= V
IL
, absolute hardware write protection is provided for all device blocks. If
PP
must remain at its programming level, and WP# must remain
PPLK
Section 16.0, “Program and Erase Characteristics” on page
, programming operations halt and SR.3 is set indicating a V
79).
Figure 36, “Program Suspend/Resume Flowchart” on
PP
is less than V
Figure 36, “Program Suspend/
PPLK
.
Order Number: 320002-10
PP
; they may
Mar 2010
63.
PP
-