MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 218

MC9S12C128VFU

Manufacturer Part Number
MC9S12C128VFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12C128VFU

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Program Memory Type
Flash
Program Memory Size
128KB
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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Chapter 7 Debug Module (DBGV1) Block Description
7.4.2.5.8
In the inside range trigger mode, if the match condition for A and B happen on the same bus cycle, both
the A and B flags in DBGSC are set and a trigger occurs. If a match condition on only A or only B occurs
no flags are set. If TRGSEL = 1, the inside range is accurate only to word boundaries. If TRGSEL = 0, an
aligned word access which straddles the range boundary will cause a trigger only if the aligned address is
within the range.
7.4.2.5.9
In the outside range trigger mode, if the match condition for A or B is met, the corresponding flag in
DBGSC is set and a trigger occurs. If TRGSEL = 1, the outside range is accurate only to word boundaries.
If TRGSEL = 0, an aligned word access which straddles the range boundary will cause a trigger only if the
aligned address is outside the range.
7.4.2.5.10
The definitions of some of the control bits are incompatible with each other.
associated with it summarize how these incompatibilities are managed:
218
Read/write comparisons are not compatible with TRGSEL = 1. Therefore, RWAEN and RWBEN
are ignored.
Event-only trigger modes are always considered a begin-type trigger. See
“Storing with
Detail capture mode has priority over the event-only trigger/capture modes. Therefore, event-only
modes have no meaning in detail mode and their functions default to similar trigger modes.
A only
A or B
A then B
Event-only B
A then event-only B
A and B (full mode)
A and not B (full mode)
Inside range
Outside range
1 — Ignored — same as force
2 — Ignored for comparator B
3 — Reduces to effectively “B only”
4 — Works same as A then B
5 — Reduces to effectively “A only” — B not compared
6 — Only accurate to word boundaries
Inside Range (A ≤ address ≤ B)
Outside Range (address < A or address > B)
Control Bit Priorities
Mode
Begin-Trigger,” and
Table 7-25. Resolution of Mode Conflicts
MC9S12C-Family / MC9S12GC-Family
Tag
Section 7.4.2.8.2, “Storing with
1
2
5
6
6
5
Normal / Loop1
Rev 01.24
Force
Tag
1, 3
4
5
5
6
6
End-Trigger.”
Table 7-25
Detail
Section 7.4.2.8.1,
Freescale Semiconductor
Force
and the notes
3
4

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