MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 393

MC9S12C128VFU

Manufacturer Part Number
MC9S12C128VFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12C128VFU

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Program Memory Type
Flash
Program Memory Size
128KB
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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13.3.2.6
Read: Anytime; reading accesses SCI receive data register
Write: Anytime; writing accesses SCI transmit data register; writing to R8 has no effect
Freescale Semiconductor
Module Base + 0x_0007
Module Base + 0x_0006
Reset
Reset
R[7:0]
T[7:0]
Field
7–0
R8
T8
7
6
W
W
R
R
Received Bit 8 — R8 is the ninth data bit received when the SCI is configured for 9-bit data format (M = 1).
Transmit Bit 8 — T8 is the ninth data bit transmitted when the SCI is configured for 9-bit data format (M = 1).
Received Bits — Received bits seven through zero for 9-bit or 8-bit data formats
Transmit Bits — Transmit bits seven through zero for 9-bit or 8-bit formats
R8
R7
T7
SCI Data Registers (SCIDRH and SCIDRL)
0
0
7
7
have to be rewritten.The same value is transmitted until T8 is rewritten
In 8-bit data format, only SCI data register low (SCIDRL) needs to be
accessed.
When transmitting in 9-bit data format and using 8-bit write instructions,
write first to SCI data register high (SCIDRH), then SCIDRL.
If the value of T8 is the same as in the previous transmission, T8 does not
= Unimplemented or Reserved
R6
T8
T6
Figure 13-8. SCI Data Registers (SCIDRH and SCIDRL)
0
0
6
6
Table 13-7. SCIDRH AND SCIDRL Field Descriptions
MC9S12C-Family / MC9S12GC-Family
R5
T5
0
0
0
5
5
Chapter 13 Serial Communications Interface (S12SCIV2) Block Description
Rev 01.24
NOTE
R4
T4
0
0
0
4
4
Description
R3
T3
0
0
0
3
3
R2
T2
0
0
0
2
2
R1
T1
0
0
0
1
1
R0
T0
0
0
0
0
0
393

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