ISP1761BE STEricsson, ISP1761BE Datasheet - Page 39
ISP1761BE
Manufacturer Part Number
ISP1761BE
Description
Manufacturer
STEricsson
Datasheet
1.ISP1761BE.pdf
(164 pages)
Specifications of ISP1761BE
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
LQFP
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1761BE
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
[1]
Table 21.
[1]
ISP1761_5
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
The reserved bits should always be written with the reset value.
CONFIGFLAG - Configure Flag register (address 0060h) bit allocation
8.2.5 CONFIGFLAG register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
23
15
31
23
15
0
0
7
0
0
0
0
7
0
reserved
Table 20.
[1]
The bit allocation of the Configure Flag (CONFIGFLAG) register is given in
Bit
31 to 14 -
13 to 0
For details on register bit description, refer to
Universal Serial Bus Rev.
[1]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
22
14
30
22
14
0
0
6
0
0
0
0
6
0
Symbol
FRINDEX
[13:0]
FRINDEX - Frame Index register (address: 002Ch) bit description
R/W
R/W
R/W
R/W
R/W
R/W
R/W
21
13
29
21
13
Description
reserved
Frame Index: Bits in this register are used for the frame number in the SOF
packet and as the index into the frame list. The value in this register
increments at the end of each time frame. For example, microframe.
0
0
5
0
0
0
0
5
0
Rev. 05 — 13 March 2008
1.0”.
reserved
R/W
R/W
R/W
[1]
R/W
R/W
R/W
R/W
20
12
28
20
12
0
0
4
0
0
0
0
4
0
FRINDEX[7:0]
reserved
reserved
reserved
reserved
[1]
Ref. 2 “Enhanced Host Controller Interface Specification for
[1]
[1]
[1]
[1]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
19
11
27
19
11
FRINDEX[13:8]
0
0
3
0
0
0
0
3
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
18
10
26
18
10
0
0
2
0
0
0
0
2
0
Hi-Speed USB OTG controller
R/W
R/W
R/W
R/W
R/W
R/W
R/W
17
25
17
0
9
0
1
0
0
0
9
0
1
0
© NXP B.V. 2008. All rights reserved.
ISP1761
Table
R/W
R/W
R/W
R/W
R/W
R/W
R/W
21.
CF
38 of 163
16
24
16
0
8
0
0
0
0
0
8
0
0
0