ADUC7121 Analog Devices, ADUC7121 Datasheet - Page 56

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ADUC7121

Manufacturer Part Number
ADUC7121
Description
Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU
Manufacturer
Analog Devices
Datasheet

Specifications of ADUC7121

Mcu Core
ARM7 TDMI
Mcu Speed (mips)
40
Sram (bytes)
8192Bytes
Gpio Pins
32
Adc # Channels
9

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ADuC7121
Name:
Address:
Default value:
Access:
Table 76. GPxDAT MMR Bit Designations
Bit
31:24
23:16
15:8
7:0
GPxSET Registers
The GPxSET registers provide a data set for the Port x registers.
Name:
Address:
Default value:
Access:
Name:
Address:
Default value:
Access:
Name:
Address:
Default value:
Access:
Name:
Address:
Default value:
Access:
Description
Direction of the data.
Set to 1 by the user to configure the GPIO pin as an
output.
Cleared to 0 by the user to configure the GPIO pin as
an input.
Port x data output.
Reflect the state of Port x pins at reset (read only).
Port x data input (read only).
GP3DAT
0xFFFF0D50
0x000000XX
Read and write
GP0SET
0xFFFF0D24
0x000000XX
Write only
GP1SET
0xFFFF0D34
0x000000XX
Write only
GP2SET
0xFFFF0D44
0x000000XX
Write only
GP3SET
0xFFFF0D54
0x000000XX
Write only
Rev. 0 | Page 56 of 96
Table 77. GPxSET MMR Bit Designations
Bit
31: 24
23:16
15:0
GPxCLR Registers
The GPxCLR registers are data clear for Port x registers.
Name:
Address:
Default value:
Access:
Name:
Address:
Default value:
Access:
Name:
Address:
Default value:
Access:
Name:
Address:
Default value:
Access:
Table 78. GPxCLR MMR Bit Designations
Bit
31:24
23:16
15:0
GPxOCE Registers
Open-collector functionality is available on the following GPIO
pins: P1.7, P1.6, Port 2, and Port 3.
Data Port x set bit.
Set to 1 by the user to set the bit on Port x; also sets
Description
Reserved.
the corresponding bit in the GPxDAT MMR.
Cleared to 0 by user; does not affect the data out.
Reserved.
Description
Reserved.
Set to 1 by the user to clear bit on Port x; also clears
the corresponding bit in the GPxDAT MMR.
Cleared to 0 by user; does not affect the data output.
Reserved.
Data Port x clear bit.
GP0CLR
0xFFFF0D28
0x000000XX
Write only
GP1CLR
0xFFFF0D38
0x000000XX
Write only
GP2CLR
0xFFFF0D48
0x000000XX
Write only
GP3CLR
0xFFFF0D58
0x000000XX
Write only

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