ADUC7121 Analog Devices, ADUC7121 Datasheet - Page 60

• Manufacturer Part Number: ADUC7121
• Description: Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU
• Manufacturer: Analog Devices

Specifications of ADUC7121

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Sram (bytes): 8192Bytes
• Gpio Pins: 32
• Adc # Channels: 9

ADuC7121
Table 81. COMCON0 MMR Bit Designations
Bit
7
6
5
4
3
2
1 to 0
UART Control Register 1
This 8-bit register controls the operation of the UART in
conjunction with COMCON0.
Name:
Address:
Default value:
Access:
COMCON1
0xFFFF0810
0x00
Read and write
Name
DLAB
BRK
SP
EPS
PEN
STOP
WLS
Description
Divisor latch access.
Set by the user to enable access to COMDIV0 and COMDIV1 registers.
Cleared by the user to disable access to COMDIV0 and COMDIV1 and enable access to COMRX,
COMTX, and COMIEN0.
Set break.
Set by the user to force the transmit pin (SOUT) to 0.
Cleared to operate in normal mode.
Stick parity. Set by the user to force parity to defined values.
1 if EPS = 1 and PEN = 1.
0 if EPS = 0 and PEN = 1.
Even parity select bit.
Set for even parity.
Cleared for odd parity.
Parity enable bit.
Set by the user to transmit and check the parity bit.
Cleared by the user for no parity transmission or checking.
Stop bit.
Set by the user to transmit 1.5 stop bits if the word length is five bits, or two stop bits if the word
length is six, seven, or eight bits. The receiver checks the first stop bit only, regardless of the
number of stop bits selected.
Cleared by the user to generate one stop bit in the transmitted data.
Word length select.
00 = five bits.
01 = six bits.
10 = seven bits.
11 = eight bits.
Rev. 0 | Page 60 of 96
Table 82. COMCON1 MMR Bit Designations
Bit
7:5
4
3:2
1
0
Name
LOOPBACK
RTS
DTR
Description
Reserved bits. Not used.
Loopback. Set by the user to enable
loopback mode. In loopback mode, SOUT is
forced high.
Reserved bits. Not used.
Request to send.
Set by the user to force the RTS output to 0.
Cleared by the user to force the RTS output
to 1.
Data terminal ready.
Set by the user to force the DTR output to 0.
Cleared by the user to force the DTR output
to 1.