ADUC7121 Analog Devices, ADUC7121 Datasheet - Page 89

• Manufacturer Part Number: ADUC7121
• Description: Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU
• Manufacturer: Analog Devices

Specifications of ADUC7121

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Sram (bytes): 8192Bytes
• Gpio Pins: 32
• Adc # Channels: 9

Table 124. Timer1 Interface Registers
Register
T1LD
T1VAL
T1CAP
T1CLRI
T1CON
Timer1 Load Registers
T1LD is a 32-bit register that holds the 32-bit value that is
loaded into the counter.
Name:
Address:
Default value:
Access:
Timer1 Clear Register
This 8-bit, write-only MMR is written (with any value) by user
code to refresh (reload) Timer1.
Name:
Address:
Default value:
Access:
Timer1 Value Register
T1VAL is a 32-bit register that holds the current value of
Timer1.
Name:
Address:
Default value:
Access:
Timer1 Capture Register
This is a 32-bit register that holds the 32-bit value captured by
an enabled IRQ event.
Name:
Address:
Default value:
Access:
Description
32-bit register. Holds 32-bit unsigned integers. This
register is read only.
32-bit register. Holds 32-bit unsigned integers.
32-bit register; Holds 32-bit unsigned integers. This
register is read only.
8-bit register. Writing any value to this register clears
the Timer1 interrupt.
Configuration MMR.
T1LD
0x00000000
Read and write
T1CLRI
0xFFFF032C
0x00
Write only
T1VAL
0xFFFF0324
0x00000000
Read only
T1CAP
0xFFFF0330
0x0000
Read only
0xFFFF0320
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Timer1 Control Register
This 32-bit MMR configures the mode of operation of Timer1.
Name:
Address:
Default value:
Access:
Table 125. T1CON MMR Bit Designations
Bit
31:24
23
22:20
19
18
17
16:12
11:9
8
7
6
5:4
3:0
Value
000
001
010
011
00
01
10
11
0000
0100
1000
1111
T1CON
0xFFFF0328
0x00000000
Read and write
Description
8-bit postscaler.
Enable write to postscaler.
Reserved.
Postscaler compare flag.
T1 interrupt generation selection flag.
Event select bit.
Set by the user to enable time capture of an event.
Cleared by the user to disable time capture of
an event.
Event select range, 0 to 16. The events are as
described in the introduction to the Timers
section.
Clock select.
Internal 32 kHz oscillator (default).
Core clock.
UCLK.
P0.6. of the P0.6/MRST/PLAI[2] pin.
Count up.
Set by the user for Timer1 to count up.
Cleared by the user for Timer1 to count down
(default).
Timer1 enable bit.
Set by the user to enable Timer1.
Cleared by the user to disable Timer1 (default).
Timer1 mode.
Set by the user to operate in periodic mode.
Cleared by the user to operate in free-running
mode (default).
Format.
Binary (default).
Reserved.
Hr:Min:Sec:Hundredths: 23 hours to 0 hour.
Hr:Min:Sec:Hundredths: 255 hours to 0 hour.
Prescaler.
Source clock divide-by-1 (default).
Source clock divide-by-16.
Source clock divide-by-256.
Source clock divide-by-32,768.
ADuC7121