ST7DALIF2 STMicroelectronics, ST7DALIF2 Datasheet - Page 145

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ST7DALIF2

Manufacturer Part Number
ST7DALIF2
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7DALIF2

8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C.
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C.
Clock Sources
Internal 1% RC oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt
ST7DALIF2
Table 86.
1. Subject to general operating conditions for V
2.
3. The I
4. Not tested in production, based on characterization results.
V
V
Symbol
V
V
OL
OL
(3)(4)
(3)(4)
OH
V
V
OL
ports and control pins) must not exceed I
ports and control pins) must not exceed I
The I
OH
OH
(2)(4)
(2)(4)
(2)
(3)
IO
IO
current sourced must always respect the absolute maximum rating specified in
current sunk must always respect the absolute maximum rating specified in
Output low level voltage for a standard
I/O pin when 8 pins are sunk at same
time
(see
Output low level voltage for a high sink
I/O pin when 4 pins are sunk at same
time
(see
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
(see
Output low level voltage for a standard
I/O pin when 8 pins are sunk at same
time (see
Output low level voltage for a high sink
I/O pin when 4 pins are sunk at same
time
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
Output low level voltage for a standard
I/O pin when 8 pins are sunk at same
time
(see
Output low level voltage for a high sink
I/O pin when 4 pins are sunk at same
time
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
(see
Output driving current
Figure
Figure
Figure
Figure
Figure
Figure
75)
77)
83)
73)
80)
Parameter
74)
VSS
VDD
DD
.
.
, f
CPU
, and T
A
I
I
I
I
I
I
I
I
I
I
I
I
unless otherwise specified.
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
=+5 mA T
=+2 mA T
=+20 mA,T
=+8 mA T
=-5 mA, T
=-2 mA T
=+2 mA T
=+8 mA T
=-2mA T
=+2 mA T
=+8 mA T
=-2 mA T
Conditions
T
T
T
T
T
T
T
T
T
T
T
T
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
≤85° C
≥85° C
≤85° C
≥85° C
≥85° C
≤85° C
≥85° C
≤85° C
≥85° C
≤85° C
≥85° C
≤85° C
≥85° C
≤85° C
≥85° C
≤85°C
≥85°C
≤85° C
≥85° C
≤85° C
≥85° C
≤85° C
≥85° C
≤85° C
(1)
Section 20.2
Section 20.2
Electrical characteristics
V
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
DD
DD
Min
and the sum of I
and the sum of I
-1.5
-1.6
-0.8
-1.0
-0.8
-1.0
-0.9
-1.0
Max
0.75
0.85
1.0
1.2
0.4
0.5
1.3
1.5
0.5
0.6
0.5
0.6
0.6
0.7
0.6
0.7
IO
IO
(I/O
145/171
(I/O
Unit
V

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