ST7DALIF2 STMicroelectronics, ST7DALIF2 Datasheet - Page 25

• Manufacturer Part Number: ST7DALIF2
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7DALIF2

• 8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• Clock Sources: Internal 1% RC oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt

ST7DALIF2
Note:
7.4
7.5
Figure 7.
If a programming cycle is interrupted (by a reset action), the integrity of the data in memory
is not guaranteed.
Power saving modes
Wait mode
The data EEPROM can enter Wait mode on execution of the WFI instruction of the
microcontroller or when the microcontroller enters Active-Halt mode.The data EEPROM will
immediately enter this mode if there is no programming in progress, otherwise the data
EEPROM will finish the cycle and then enter Wait mode.
Active-halt mode
Refer to Wait mode.
Halt mode
The data EEPROM immediately enters Halt mode if the microcontroller executes the HALT
instruction. Therefore the EEPROM will stop the function in progress, and data may be
corrupted.
Access error handling
If a read access occurs while E2LAT=1, then the data bus will not be driven.
If a write access occurs while E2LAT=0, then the data on the bus will not be latched.
E2LAT bit
E2PGM bit
DEFINITION
ROW
Data EEPROM write operation
Byte 1
Set by USER application
⇓ Row / Byte ⇒ 0 1 2 3
Writing data latches
Byte 2
PHASE 1
...
N
0
1
Read operation impossible
Byte 32
Waiting E2PGM and E2LAT to fall
Programming cycle
PHASE 2
... 30 31
Nx20h...Nx20h+1Fh
Physical address
00h...1Fh
20h...3Fh
Read operation possible
Cleared by hardware
Data EEPROM
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