ST7DALIF2 STMicroelectronics, ST7DALIF2 Datasheet - Page 41

• Manufacturer Part Number: ST7DALIF2
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7DALIF2

• 8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• Clock Sources: Internal 1% RC oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt

ST7DALIF2
Note:
1
2
3
4
The LVD Reset circuitry generates a reset when V
●
●
The LVD function is illustrated in
The voltage threshold can be configured by option byte to be low, medium or high.
Provided the minimum V
the MCU can only be in two modes:
●
●
In these conditions, secure operation is always ensured for the application without the need
for external reset hardware.
During a Low Voltage Detector Reset, the RESET pin is held low, thus permitting the MCU
to reset other devices.
The LVD allows the device to be used without any external RESET circuitry.
The LVD is an optional function which can be selected by option byte.
Use of LVD with capacitive power supply: with this type of power supply, if power cuts occur
in the application, it is recommended to pull V
conditions. Refer to circuit example in
It is recommended to make sure that the V
device is exiting from Reset, to ensure the application functions properly.
Figure 16. Low voltage detector vs reset
V
V
RESET
IT-
IT+
V
V
Under full software control
In static safe reset
(LVD)
(LVD)
IT+(LVD)
IT-(LVD)
V
DD
when V
when V
DD
DD
is falling
is rising
DD
value (guaranteed for the oscillator frequency) is above V
Figure
Figure 87 on page 150
16.
DD
DD
supply voltage rises monotonously when the
down to 0V to ensure optimum restart
V
DD
hys
Supply, reset and clock management
is below:
and note 4.
IT-(LVD)
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