ST7DALIF2 STMicroelectronics, ST7DALIF2 Datasheet - Page 32

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ST7DALIF2

Manufacturer Part Number
ST7DALIF2
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7DALIF2

8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C.
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C.
Clock Sources
Internal 1% RC oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt
Supply, reset and clock management
9
9.1
9.2
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Supply, reset and clock management
The device includes a range of utility features for securing the application in critical
situations (for example in case of a power brown-out), and reducing the number of external
components.
Main features
Internal RC oscillator adjustment
The device contains an internal RC oscillator with an accuracy of 1% for a given device,
temperature and voltage range (4.5 V-5.5 V). It must be calibrated to obtain the frequency
required in the application. This is done by software writing a calibration value in the RCCR
(RC Control Register).
Whenever the microcontroller is reset, the RCCR returns to its default value (FFh), i.e. each
time the device is reset, the calibration value must be loaded in the RCCR. Predefined
calibration values are stored in EEPROM for 3 and 5 V V
shown in the following table.
Clock management
Reset Sequence Manager (RSM)
System Integrity Management (SI)
1 MHz internal RC oscillator (enabled by option byte)
1 to 16 MHz or 32 kHz External crystal/ceramic resonator (selected by option byte)
External clock input (enabled by option byte)
PLL for multiplying the frequency by 8 or 4 (enabled by option byte)
For clock ART counter only: PLL32 for multiplying the 8 MHz frequency by 4
(enabled by option byte). The 8 MHz input frequency is mandatory and can be
obtained in the following ways:
1 MHz RC + PLLx8
16 MHz external clock (internally divided by 2)
2 MHz. external clock (internally divided by 2) + PLLx8
Crystal oscillator with 16 MHz output frequency (internally divided by 2)
Main supply Low voltage detection (LVD) with reset generation (enabled by option
byte)
Auxiliary Voltage detector (AVD) with interrupt capability for monitoring the main
supply (enabled by option byte)
DD
supply voltages at 25° C, as
ST7DALIF2

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