ST7DALIF2 STMicroelectronics, ST7DALIF2 Datasheet - Page 18

• Manufacturer Part Number: ST7DALIF2
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7DALIF2

• 8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• Clock Sources: Internal 1% RC oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt

Register and memory map
18/171
Table 3.
1. The contents of the I/O port DR registers are readable only in output configuration. In input configuration,
2. The bits associated with unavailable pins must always keep their reset value.
3. For a description of the Debug Module registers, see ST7 ICC Protocol Reference Manual.
Legend: x=undefined, R/W=read/write
003Dh to
Address
0046h to
0051h to
003Ah
003Bh
003Ch
004Ah
004Bh
004Ch
004Dh
004Eh
0034h
0035h
0036h
0037h
0038h
0039h
003Fh
0040h
0041h
0042h
0043h
0044h
0045h
0048h
0049h
004Fh
0050h
007Fh
the values of the I/O pins are returned instead of the DR register contents.
Block
Reset
Clock
DM
MCC
AWU
ADC
DALI
Hardware register map (continued)
and
ITC
ITC
(3)
ADCCSR
ADCDRH
ADCDRL
EICR
MCCSR
RCCR
SICSR
EISR
DCMCLK
DCMFA
DCMFD
DCMBD
DCMCR
DCMCSR
AWUPR
AWUCSR
DMCR
DMSR
DMBK1H
DMBK1L
DMBK2H
DMBK2L
Register
label
A/D Control Status Register
A/D Data Register High
A/D Amplifier Control/Data Low
Register
External Interrupt Control Register
Main Clock Control/Status Register
RC oscillator Control Register
System Integrity Control/Status
Register
External Interrupt Selection Register
DALI Clock Register
DALI Forward Address Register
DALI Forward Data Register
DALI Backward Data Register
DALI Control Register
DALI Control/Status Register
AWU Prescaler Register
AWU Control/Status Register
DM Control Register
DM Status Register
DM Breakpoint Register 1 High
DM Breakpoint Register 1 Low
DM Breakpoint Register 2 High
DM Breakpoint Register 2 Low
Reserved area (47 bytes)
Reserved area (3 bytes)
Reserved area (3 bytes)
Reserved area (1 byte)
Register name
0000 0xx0b
status
Reset
FFh
0Ch
FFh
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
xxh
0xh
ST7DALIF2
R/W
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Remarks