ST7DALIF2 STMicroelectronics, ST7DALIF2 Datasheet - Page 73

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ST7DALIF2

Manufacturer Part Number
ST7DALIF2
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7DALIF2

8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C.
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C.
Clock Sources
Internal 1% RC oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt
ST7DALIF2
14.3
14.3.1
Note:
Figure 33. Block diagram
Functional description
PWM mode
This mode allows up to four Pulse Width Modulated signals to be generated on the PWMx
output pins. The PWMx output signals can be enabled or disabled using the OEx bits in the
PWMCR register.
PWM frequency and duty cycle
The four PWM signals have the same frequency (f
period and the ATR register value.
f
Following the above formula,
The maximum value of ATR is 4094 because it must be lower than the DCR value which
must be 4095 in this case.
At reset, the counter starts counting from 0.
When a upcounter overflow occurs (OVF event), the preloaded Duty cycle values are
transferred to the Duty Cycle registers and the PWMx signals are set to a high level. When
PWM
ATIC
If f
4092), the minimum value is 8 kHz (ATR register value = 0)
If f
4094),the minimum value is 1 KHz (ATR register value = 0).
= f
COUNTER
COUNTER
COUNTER
f
(1 ms
@ 8MHz)
LTIMER
timebase
32 MHz
f
CPU
12-BIT DUTY CYCLE VALUE (shadow)
Preload
DCR0H
4 PWM Channels
ATCSR
is 32 MHz, the maximum value of f
is 4 Mhz
/ (4096 - ATR)
0
ATICR
Preload
DCR0L
on OVF Event
IF TRAN=1
ICF
,
12-BIT INPUT CAPTURE REGISTER
the maximum value of f
ICIE
f
COUNTER
IC INTERRUPT
CK1
REQUEST
CNTR
ATR
CK0
12-BIT AUTORELOAD REGISTER
OVF
12-BIT UPCOUNTER
CMPFx bit
COMP-
PARE
OVFIE
PWM
PWM
PWM
CMPF3
CMPF0
CMPF1
CMPF2
CMPIE
) which is controlled by the counter
is 2 MHz (ATR register value =
is 8 MHz (ATR register value =
12-bit autoreload timer 2 (AT2)
OVF INTERRUPT
REQUEST
f
PWM
OPx bit
POL-
ARITY
CMP
REQUEST
INTERRUPT
OEx bit
PWMx
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