ST7DALIF2 STMicroelectronics, ST7DALIF2 Datasheet - Page 71

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ST7DALIF2

Manufacturer Part Number
ST7DALIF2
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7DALIF2

8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C.
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C.
Clock Sources
Internal 1% RC oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt
ST7DALIF2
13.6
13.6.1
Note:
Register description
Control register (CR)
Read/Write
Reset Value: 0111 1111 (7Fh)
Bit 7 = WDGA Activation bit.
This bit is set by software and only cleared by hardware after a reset.
When WDGA = 1, the watchdog can generate a reset.
0: Watchdog disabled
1: Watchdog enabled
This bit is not used if the hardware watchdog option is enabled by option byte.
Bits 6:0 = T[6:0] 7-bit timer (MSB to LSB).
These bits contain the decremented value. A reset is produced when it rolls over from 40h to
3Fh (T6 becomes cleared).
Table 35.
Address
002Eh
(Hex.)
WDGA
7
WDGCR
Reset
Value
Register
Watchdog timer register map and reset values
label
T6
WDGA
7
0
T5
T6
6
1
T4
T5
5
1
T4
4
1
T3
T3
3
1
T2
Watchdog timer (WDG)
T2
2
1
T1
T1
1
1
T0
0
71/171
T0
0
1

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