ST7DALIF2 STMicroelectronics, ST7DALIF2 Datasheet - Page 17

• Manufacturer Part Number: ST7DALIF2
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7DALIF2

• 8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• Clock Sources: Internal 1% RC oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt

ST7DALIF2
Table 3.
Address
0023h to
0002Fh
00030h
000Ah
000Bh
000Ch
000Dh
000Eh
001Ah
001Bh
001Ch
001Dh
001Eh
002Dh
002Eh
0000h
0001h
0002h
0003h
0004h
0005h
0006h
0007h
0008h
0009h
000Fh
0010h
0011h
0012h
0013h
0014h
0015h
0016h
0017h
0018h
0019h
001Fh
0020h
0021h
0022h
0031h
0032h
0033h
EEPROM EECSR
RELOAD
TIMER 2
TIMER 2
FLASH
AUTO-
Block
Port A
Port B
WDG
LITE
Hardware register map
SPI
PADR
PADDR
PAOR
PBDR
PBDDR
PBOR
LTCSR2
LTARR
LTCNTR
LTCSR1
LTICR
ATCSR
CNTRH
CNTRL
ATRH
ATRL
PWMCR
PWM0CSR
PWM1CSR
PWM2CSR
PWM3CSR
DCR0H
DCR0L
DCR1H
DCR1L
DCR2H
DCR2L
DCR3H
DCR3L
ATICRH
ATICRL
TRANCR
BREAKCR
WDGCR
FCSR
SPIDR
SPICR
SPICSR
Register
label
Port A Data Register
Port A Data Direction Register
Port A Option Register
Port B Data Register
Port B Data Direction Register
Port B Option Register
Lite Timer Control/Status Register 2
Lite Timer Auto-reload Register
Lite Timer Counter Register
Lite Timer Control/Status Register 1
Lite Timer Input Capture Register
Timer Control/Status Register
Counter Register High
Counter Register Low
Auto-Reload Register High
Auto-Reload Register Low
PWM Output Control Register
PWM 0 Control/Status Register
PWM 1 Control/Status Register
PWM 2 Control/Status Register
PWM 3 Control/Status Register
PWM 0 Duty Cycle Register High
PWM 0 Duty Cycle Register Low
PWM 1 Duty Cycle Register High
PWM 1 Duty Cycle Register Low
PWM 2 Duty Cycle Register High
PWM 2 Duty Cycle Register Low
PWM 3 Duty Cycle Register High
PWM 3 Duty Cycle Register Low
Input Capture Register High
Input Capture Register Low
Transfer Control Register
Break Control Register
Watchdog Control Register
Flash Control/Status Register
Data EEPROM Control/Status
Register
SPI Data I/O Register
SPI Control Register
SPI Control Status Register
Reserved area (11 bytes)
Reserved Area (2 bytes)
Register name
Register and memory map
0x00 0000b
0x00 0000b
status
Reset
FFh
FFh
00h
40h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
01h
00h
7Fh
00h
00h
00h
xxh
0xh
(1)
1)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read Only
R/W
Read Only
R/W
Read Only
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read Only
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Remarks
(2)
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