ST7DALIF2 STMicroelectronics, ST7DALIF2 Datasheet - Page 69

• Manufacturer Part Number: ST7DALIF2
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7DALIF2

• 8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• Clock Sources: Internal 1% RC oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt

ST7DALIF2
13
13.1
13.2
13.3
Watchdog timer (WDG)
Introduction
The Watchdog timer is used to detect the occurrence of a software fault, usually generated
by external interference or by unforeseen logical conditions, which causes the application
program to abandon its normal sequence. The Watchdog circuit generates an MCU reset on
expiry of a programmed time period, unless the program refreshes the counter’s contents
before the T6 bit becomes cleared.
Main features
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Functional description
The counter value stored in the CR register (bits T[6:0]), is decremented every 16000
machine cycles, and the length of the timeout period can be programmed by the user in 64
increments.
If the watchdog is activated (the WDGA bit is set) and when the 7-bit timer (bits T[6:0]) rolls
over from 40h to 3Fh (T6 becomes cleared), it initiates a reset cycle pulling low the reset pin
for typically 30 µs.
Figure 32. Watchdog block diagram
The application program must write in the CR register at regular intervals during normal
operation to prevent an MCU reset. This downcounter is free-running: it counts down even if
Programmable free-running downcounter (64 increments of 16000 CPU cycles)
Programmable reset
Reset (if watchdog activated) when the T6 bit reaches zero
Optional reset on HALT instruction (configurable by option byte)
Hardware Watchdog selectable by option byte
f
CPU
WDGA
RESET
T6
T5
WATCHDOG CONTROL REGISTER (CR)
7-BIT DOWNCOUNTER
CLOCK DIVIDER
T4
÷16000
T3
T2
T1
T0
Watchdog timer (WDG)
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